Design For The EEG Biofeedback Machine System And Research On Algorithm

EEG biofeedback machine is a medical instrument that can diagnose the physiological activity of brain inner nerve cells, by gathering brain electrical signals of patients, and analyzing its relation with the onset of disease activity and type. The medical equipment has been used in clinical medicine, as a tool to provide reliable basis for the further treatment of patients especially for clinical brain, which plays an important role in the mental rehabilitation of traumatic fracture.However, the current domestic design EEG biofeedback machine based on the hardware scheme of FPGA+MCU, and extract evoked EEG through the algorithm after send the data to PC software, which resulted in some defects in the system. On the hardware, there are many problems like the anti-jamming capability is not strong, the synchronization is weak and the data transmission is a large quantity. In the algorithm, it is still using the traditional superposition average algorithm to extract signals. It needs to test the testers for many times to get the signals, which may influence their nervous system and lead to not accurate signals. Focused on the above problems, this paper put forward a hardware scheme that based on FPGA+DSP+ARM to make the system have both strong control ability and complex data processing ability, improve the amplifier circuit and the anti-interference ability. Extracting the signal with DSP algorithm, which lightened the burden to the system, reduce the signal distortion and improve the system synchronization.Based on design scheme above, the main works of this paper are as follows:In the aspect of hardware design, the paper analyses the system’s core circuit module design; introduces how to design the circuit in order to realize the algorithm transplantation to the next bit machine. Studying on how to adopt the method of extension SRAM solution algorithm is to transplanted to DSP platform involves a lot of data storage problem;Using multiple chips, while increasing the difficulty of circuit design, burden is reduced on the upper machine communication, improved the performance of the system and synchronicity.In algorithm design, this paper introduces how to use superposition average algorithm to extract of ERP, and by introducing the weighted factor of superposition algorithm to improve the layers of signals. In the section, the algorithm by MATLAB simulation and analyzed before and after improvement, verify the weighted superposition algorithm was superior to the effect of the extraction of ERP.In terms of program design, it mainly introduced the signal acquisition module of the software implementation, more than one chip interconnection between bus communication interface module design. Studies on how to implement DSP through FPGA internal FIFO buffer module, high-speed data transmission between the FPGA and ARM have done; And through the flow chart of each module, in the form of program implementation process are described and analyzed.