| Interleaving is a reorder of data sequence with a certain algorithm. Interleaving thatcombined with error control coding is an efficient method to deal with burst errors on datatransmission. Hardware-Multiplexing is a technology that use a kind of hardware toimplement several standards, while the implementation of existing single-standardinterleaver shows its great application limitations. Thus the research and implementation ofa multi-standard supported interleaving sub-system base on the hardware-multiplexingtechnology will certainly improve the flexibility of the whole system.With the study on channel interleaving algorithm of various communication standardsand analysis of hardware re-use methodology，this thesis use a top-down design method torealize the multi-standard interleaver which consists of Address Generation Unit andMemory Unit. This system is a specialized block with reconfigurable capability that cansupport multi-standards. In addition, with the help of FPGA verification platform, we hasverified each part and the whole interleaving system using the bottom-up verificationmethod in a embedded Nios II system. The final verification results prove that this design isa reconfigurable interleaver module, capable to implement any of the interleaving operationdefined in the WiMAX/WLAN,802.11n, HS-DSCH and DVB-H. This system caneffectively improve the reliability of the information transmission in brust channel.Furthermore, the proposed multi-standard reconfigurable interleaver achieves a reduction ofhardware resources with highly flexibility as well as equivalent performance whencompared with the general methods, which implement the interleaver of various standardsrespectively.In this project, the completed work includes the following parts:1．Analysis and optimize the interleaving permutation for each standard.2．Design and implement the hardware architecture of the four interleaving algorithm,and then give a functional simulation.3．Multiplexing of Address Generator Unit and the Memory Unit, analysis its hardwareresources and performance. 4．Simulate the multi-standard interleaver and verify the whole system with Nios II. |
