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Design Of FPGA Bidirection Data Transmission System Based On Gigabit Ethernet

Posted on:2015-12-09Degree:MasterType:Thesis
Country:ChinaCandidate:P T ShiFull Text:PDF
GTID:2308330464468636Subject:Pattern Recognition and Intelligent Systems
Abstract/Summary:PDF Full Text Request
The development of Ethernet technology changes rapidly. Much industrial and civilian equipment also needs to access the Internet, and video transmission with high speed has caused the widely use of Gigabit Ethernet. The advances in FPGA chip technology injected more huge vigor for the embedded system; one-chip system can support abundant function. IP library that has being perfected continually provides many reliable and general modules for designers, which reduces development time greatly.This paper starts at the basic content of network model, and then we make it ascend from physical layer to introduce knowledge, which is directly relevant to our design. The ultimate goal is to find the corresponding implementation scheme for our practical system function. All the modules are eventually into an integral part of our whole system structure: the PHY chip of physical layer, the controller IP core of MAC sublayer, the simplified RTL description of UDP/IP protocol stack and the self-customized protocol of application layer. A DDR2 SDRAM chip is also used to help finish data cache and retransmission of lost packets, which has compensated for the deficiencies of UDP/IP. Finally, we choose to implement two representative applications based on the model that we have built before: video playback and data acquisition. This becomes a powerful support to the correctness of our design.This system has passed the strict debugging and troubleshooting procedure and can work correctly. But the defects and deficiencies are inevitable, which have also been mentioned in the end of this paper.
Keywords/Search Tags:Gigabit Ethernet, UDP/IP protocol stack, DDR2 SDRAM, Jumbo frame
PDF Full Text Request
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