Research Of The Fault-tolerant Methods On Input Ports Of Router In Three Dimensional Network-on-Chip

Three-dimensional Network-on-Chip combines the scalability of Network-on-Chip and vertical interconnect technology, which greatly improves the performance of system, reducing power consumption. But, routers become subject to physical manufacture defects and running-time vulnerability in the deep submicron technology, which result in input port permanent faults. The faults affect the performance and functionality of systems and result in communication malfunctions. Therefore, this thesis will make an intensive study of fault-tolerant problems of input ports of router. The main ideas are as follows:This thesis describes the development of integrated circuits, the research background of the 3D NoC, and the fault type of the chip. Also, it introduces the topology of 2D NoC and 3D NoC, and the common fault tolerance method of NoC.In order to solve the problem of faults occurring in the input ports and crossbar of the router, this article proposes a fault and congestion-aware fault-tolerant router. By adding a redundancy of the input port and the bypass bus, our scheme can achieve fault tolerance of input ports and crossbar faults, and can effectively solve the congestion problem in the case of no fault port using the redundant port. The fault tolerance mechanism proposed san tolerate more fault-routers and still maintain good performance in a serious case of congestion.In order to tolerate virtual channel faults effectively, and to ensure system performance and efficient usage of available resources, the type of failure is subdivided into coarse-grained fault and fine-grained fault, and then we propose the SVS router (Single Virtual Channel Sharing Router) architecture to achieve a single virtual channel sharing between ports in the same group, which contains two ports in the router. Coarse-grained faults are tolerated by using adjacent ports’ shared virtual channel in the same group. According to the information of Slot State Table, fine-grained faults are tolerated by configuring read/write pointer value to skip fault buffer slots. Also, in the absence of coarse-grained fault condition, shared virtual channel can be used for load balancing and fault tolerance of calculation module. Experimental results demonstrate significant reduction in average packet latency, and improvement in throughput under three different fault conditions compared to other existing virtual channel architectures.It shows that this scheme effectively improves system reliability, ensures system performance and makes full use of the available resources.