Design And Implementation Of Lightweight Arithmetic Circuits On FPGA

Low-power digital circuit design is an important direction of large-scale digital circuit system research. With the continuous development of wireless sensor networks and smart mobile devices, the algorithms about these are growing rapidly. This will leads to more complex computing. The study of high efficiency, low-power hardware-specific calculation circuit become an important issue, especially in cooling costs as well as the battery capacity are limited today.Approximate computing has emerged as a new design paradigm that allowing hardware implementations to forsake exact algorithmic specifications. So the lightweight circuit operation structure can be designed to achieve the purpose of reducing the computing area and power consumption. Multiplication and division are the most commonly used basic arithmetic circuit. Almost all algorithms contain these. But the traditional multiplication and division structure cannot meet the requirements of energy consumption that comes from high efficiency computing. Therefore, this thesis designed a lightweight multiplier circuit based on approximate arithmetic. Simultaneously, a lightweight operation circuit based on SRT algorithm was proposed. Since the shift adder structure is the essential element of multiplier and divider. Firstly, in this thesis, a lightweight addition operation structure was achieved through the study of the current existence of the addition operation structure which can improve the speed of addition. Secondly, a lightweight 4-2 compressor was designed which can reduce the carry chain of multiplication structure and the resource consumption. Thirdly, a lightweight division algorithm is proposed according to the idea of gradual truncation of the carry chain by analyzing the characteristics of traditional SRT division algorithm and the small delay of carry save adder. This can maximally save resource consumption and improve the speed of circuit. Fourthly, in order to verify the effect of lightweight computing,this thesis designed a histogram equalization image enhancement system based on the lightweight arithmetic unit. The results compared with the accurate calculations show that the lightweight operation unit can effectively improve the performance of speed, area, frequency and power consumption of the system.