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The Study On Verification Approach Of CDC Synchronous Circuits In The Airborne Complex Electronic Hardware

Posted on:2017-11-14Degree:MasterType:Thesis
Country:ChinaCandidate:W H LiuFull Text:PDF
GTID:2322330503488092Subject:Safety science and engineering
Abstract/Summary:PDF Full Text Request
In civil aircraft, electronic hardware is increasingly used in safety-critical components, which has brought new challenges to aircraft’s safety and certification. Due to the increasing complexity of electronic hardware, the design errors of electronic hardware become more difficult to control, and the function of aircraft is more easily influenced by design errors of airbone electronic hardware. In the field of aviation safety, it will bring serious safety hazards to aircraft if the complex electronic hardware key components appear metastable transmission problem. It is necessary to conduct a comprehensive verification for airborne complex electronic hardware cross clock domain synchronization circuit, to ensure the reliability and correctness of design.The study on verification of CDC synchronous circuits in the airbone complex electronic hardware is presented in this thesis. Firstly, it summarizes the current commonly used CDC synchronous circuits, and descripts the protocol of each circuit. Secondly the paper presents the method of synchronous circuit structure inspection based on QuestaCDC software by descripting the build process of static verification environment, CDC circuit structure inspection procedures and the common design errors and correction schemes. And then it presents the method of synchronous circuit protocol verification based on SystemVerilog Assertions technique by introducing SystemVerilog Assertions, and extracting the circuit protocols for circuit verification assertions. The complete method of CDC signal behavior characteristics verification contains the method of synchronous circuit structure inspection based on QuestaCDC software and the method of synchronous circuit protocol verification based on SystemVerilog Assertions technique. Then the MTBF analyses are presented, including MTBF analysis of one flip-flop and MTBF analysis of FPGA, and the risk assessment method of CDC circuit is sorted out. Under the guidance of the idea, the measurement method of metastability parameter based on FPGA is put forward.Finally, it verifies the proposed verification approach of CDC synchronous circuits in the airbone complex electronic hardware through a practical project, including the method of CDC signal behavior characteristics verification and the risk assessment method of CDC circuit. The verification result is good, which proves the proposed verification method in this paper is correct and effective.
Keywords/Search Tags:Clock Domain Crossing, Metastability, MTBF, SVA, FPGA
PDF Full Text Request
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