The GPS Synchronization Clock Of Power System Based On SoPC

Power IEDs such as microcomputer relay, fault recorder, RTU require an uniform time signal to synchronize their internal clocks to perform protection, monitoring, control and fault analysis functions properly. The high synchronization accuracy makes some new automation functions, such as traveling wave fault location, wide-area phasor measurement, possible. So far most synchronization clocks used in field are based on GPS signal and have fixed output configuration. They can not meet the requirements of IEDs of various substations in terms of type and number of synchronization signals needed. A new design scheme of synchronization clock using SoPC, which has configurable output, is investigated in this paper.The development of time synchronization technology is introduced. The time synchronization methods can be classified into three kinds, the schlepping clock method, the unidirectional synchronization method and the bidirectional synchronization method. Based on the analysis to the advantages and disadvantages of these methods, it is pointed out the GPS provide a reliable, accurate and low-cost synchronization means for power system. The requirements of power IED to time synchronization signal are summarized. The type and number of output of synchronization clock are changing depending on the scale substations and the IEDs inside.The configuration and working principle the GPS synchronization clock are introduced. Based on the analysis to three design scheme of the clock it is concluded that the design based on SoPC has configurable output and can easily be adapted to meet the synchronization requirement different power substations. The basic concepts and applications of SoPC are briefly introduced. The design scheme SoPC based clock is presented and the functions of different modules are described. Then hardware of GPS synchronous clock based on SoPC is designed with the Quartusâ…¡software. The signal conversion and extension IP cores are implemented with Verilog HDL and simulated with Quartusâ…¡software. The simulation results proved feasibility of the design method .The GPS synchronization clock based on SoPC can meet the requirements of different power to the type and number of synchronization signals simply by changing the IP cores of FPGA. The research conducted is vital to promote the application of time synchronization in power system.