Research And Design Of Embedded Power Quality Monitor

Due to the extensive application of power electronic technology and new energy power generation technology, power quality problems have become more and more serious nowadays. Against such a backdrop, meliorating the quality of power has been introduced by grid company as an important part of power distribution networks to avoid equipment damage and to determine the cause of the disturbances. It should be also clear that improving power qulity is not only the precondition for ensuring safe operation of power system but also the common requirement of power generation enterprise, power transmission enterprise and power consumers. In order to fulfill this requirement, a fully functional power quality monitor is required. Consequently, this thesis focuses on the design of power quality monitor and thanks to the embedded technology, a "DSP+ARM" dual-core based monitor is implemented. Inside the monitor, several key technology points such as monitoring algorithm, monitoring hardware, communications and software are discussed and improved.The details are as follows:To construct the monitoring algorithm,(1) a approach for separating data transmission and data calculation is proposed to improve DSP's computing speed. Based on the DMA module of DSP, this approach makes the resources of CPU focusing on index calculation without having to take into account data transmission, so the calculation speed can be improved;(2)The computing algorithms and computing window for various power quality monitoring indicators are derived in detail. Then the calculation process of monitoring indicators is designed overall, which provides data processing and algorithm support for monitoring instruments.To build the monitor hardware,(1) a method for data sampling is proposed based on synchronization variable sampling structure which consists of two cascaded composition. The front portion provides a synchronization signal for data acquisition using a locked loop circuit. And the subsequent-stage uses ePWM processor module of DSP to emit an acquisition drive signal which is controlled by the synchronization signal. Therefore, the system can achieve sampling synchronization and can also change the sample rate and duty cycle through the software conveniently. Compared with the traditional structure, this method can ensure the synchronization when sample rate is changed. So, it can meet the needs of different occasions better.(2)Based on above design ideas, a hardware circuit system of power quality monitoring instrument is built using EDA software. And the realization of each sub-circuit is analyzed in this paper. The circuit system provides hardware foundation and computing platforms to power quality monitoring algorithm.To complete the monitor software, three programs are designed in ARM systme:(1) Focusing on the data exchange between DSP system and ARM system, a SPI communication program is constructed Firstly. The program can transport the DSP alculation results and real-time acquisition data from DSP to AMR.(2)Secondly, the embedded human-computer interaction programe and network communication program are completed under C++ programming environment using Linux operating system and QT software. These programs makes the power quality monitoring instrument designed in the paper having a national standard required function for communication, display and data storage and also riches practical performance of the instrument.Finally a prototype of power quality monitor is completed with the combination of algorithm, hardware and software which are designed above. Then, power quality index testing and error analysis is given and the results show this prototype can basically meet the requirements of power quality standards, but still having problems to improve. This paper discusses many design details of power quality monitor, so can offer a reference for design of the same type of product.