Hardware Design Of FC-AE And 1553B Simulation Node Card

With the continuous development and improvement of avionics system,Fibre Channel-Avionics Environment has been mainly applied in mission-critical and real-time avionics networks with the advantages of high transmission rate,low delay,low bit error rate and strong anti-interference ability.Among them,FC-AE-ASM and FC-AE-1553 are the most widely used.In addition,MIL-STD-1553 B is a kind of military standard proposed in the 1970 s,and has been broadly employed in the land,sea and air military management control system because of bus-based centralized control and distributed processing,real-time response,good fault tolerance and fault isolation and so on.Also with the continuous development and attention of the aerospace technology in our country,the study of the equipment related to FC-AE and 1553 B had a great demand.Nowadays,the node card in the domestic avionics system only supports single protocol,which cannot meet the functional requirements of the complex network environment.In this thesis,the design of FC-AE and 1553 B simulation node card will achieve that one card support multi-protocol,so it has great advantage in function and cost.This simulation node card not only supports FC-AE-ASM and FC-AE-1553 in FC-AE protocol cluster,but also can perform protocol mapping as a protocol bridge between the Network Controller or Network Terminal of the FC-AE-1553 network and the Remote Terminal of the MIL-STD-1553 B bus.Furthermore,it can serve as a Bus Controller,Remote Terminal or Bus Monitor equipment,compatible with the traditional 1553 B protocol standard.Firstly,this thesis analyzes the purpose and significance of this design,based on the research background and the current situation of domestic and foreign research.Secondly,the contents of FC-AE and 1553 B related protocols are studied in depth,which provides the theoretical basis for the hardware design and implementation of the simulation node card.Then,this thesis proposes the overall design architecture through the analysis of the functional requirements of FC-AE and 1553 B simulation node card,and introduces the design architecture of the read and write memory state machine of the FC-AE-ASM,also analyzes and compares two kinds of design scheme of the FC-AE-1553,and mainly introduces how to use the hardware state machine to process the FC-AE-1553 exchange modes and the frame segmentation and reassembly.At the same time,this thesis summarizes and analyzes the format mapping specification and transmission mode mapping of the protocol bridge between the FC-AE-1553 and the 1553 B,and also introduces the MIL-STD-1553 B hardware design scheme.And then this thesis use FPGA to achieve all the hardware modules based on the corresponding hardware design and protocol standards.In this thesis,the design can be divided into FC module,DMA module,FC-AE-ASM module,FC-AE-1553 module,FC-AE-1553 and 1553 B protocol bridge module and MIL-STD-1553 B module.Finally,the function simulation results of each module are analyzed in detail.Once the function simulation meets the design requirements,the RTL code is synthesized,implemented and placed & routed by the development tools.After the bit file is generated,the board test is performed.And through the joint debugging of hardware and software,the functions and performance of each module of the FC-AE and 1553 B simulation node card are tested.