Design Of Digital Signal Processing Module For 20GSPS Oscilloscope

Nowadays digital signal processing(DSP)technology is more and more widely used in oscilloscope field.There are many DSP techniques have been applied to various oscilloscope such as sine interpolation,low-pass filtering,high-pass filtering,FFT,digital trigger,ADC correction,frequency compensation,and eye diagrams.With the development of modern sub-micron chip technology,ASIC and FPGA have gradually become the main chip of DSP systems due to their embedded rich hard core types and parallel structures.This article will focus on the research and design of the TIADC system error correction function and the frequency compensation function in the DSP module based on the 20 GSPS oscilloscope system.Besides,this article discusses the implementation of DSP module in FPGA.The main research content of this article is as follows:(1)Studying error correction in 20 GSPS TIADC System.This paper analyzes the error model of the TIADC system and compares two error estimation algorithms.Then a TIADC error estimation method based on FFT spectral analysis was proposed.In this paper,after comparing several kinds of correction schemes,the combination of analog correction and digital post-correction realizes the correction of three types of errors.(2)Studying frequency compensation technology of oscilloscope system.Based on the existing platform,this article analyzes and compares methods that can enhance the oscilloscope's measurement bandwidth.Then it proposes a scheme based on frequency compensation to improve the measurement bandwidth of the system and simulates its feasibility.Aiming at this scheme,a fast correction method for multi-channel frequency compensation was proposed.This method saves manpower and time costs and also improves correction efficiency.(3)Research on digital filtering technology based on FPGA.First of all,this article analyzes the characteristics of different digital filters based on the data processing architecture of this project.Then it analyzes the various FPGA implementation structures of the FIR filter in consideration of the internal resources of the FPGA chip.Finally,a fully parallel or semi-parallel filter architecture suitable for this system is derived,which is applied to digital post-correction for frequency compensation.Experimental and test results show that the offset,gain,and time errors of the TIADC system are corrected.Acquisition performance of the TIADC system has been improved.In addition,the measurement bandwidth of the oscilloscope system has been improved by using frequency compensation technique and has been verified to reach 4 GHz.