Hardware Design Of Trigger And Decoding Protocol For High Resolution Digital Oscilloscope

With the rapid development of electronic technology,serial bus signal is used in different fields as the carrier of communication between electronic devices.According to the characteristics of the application field,various serial bus protocol standards have come out one after another,and the protocol standards are becoming more and more complex.The signal rate is getting higher and higher.Serial bus protocol signal can transfer information including signal electrical characteristics and data.As a universal electronic measuring instrument,the original trigger functions such as pulse width and edge can only be searched and located simply by waveform characteristic condition.Nowadays,in the electronic equipment testing process,according to the trigger condition set by the user,the digital oscilloscope can finish the protocol triggering function,and the protocol decoding and display function can be completed on the serial bus protocol signal.The protocol analysis function can also detect whether the data contained in the serial bus signal transmission process has format problems and error codes.At the same time,the protocol trigger and decoding function modules need to enrich the serial protocol types and improve the running efficiency.The design of protocol trigger and decoding module in this project is based on the high resolution digital oscilloscope and can meet the performance requirements of the protocol analysis function of the project.During the research and development of the project,the feasibility design scheme of realizing the serial bus protocol analysis function is put forward,the protocol analysis module can be used to analyze the signal of serial protocol.This paper focuses on the implementation of serial bus protocol analysis,the main research contents are as follows:1.On the hardware platform of high resolution oscilloscope,the whole structure design of protocol trigger and decoding hardware module is completed.The module design scheme realizes the function of protocol analysis module through software control under the cooperation of other hardware modules.2.The functions of protocol triggers and decodes hardware module come true.According to the protocol standards,the design of different protocol modules is completed,and the serial bus protocol trigger and decoding function including NRZ?ARINC 429?DigRF-3G?JTAG?USB2.0?SENT?Manchester is implemented with the structure of "ADC +FPGA+IPC".The rationality and correctness of the design of the protocol trigger and decoding hardware module are tested,including the generation of the protocol test signal,the formulation of the function test scheme,and the comparison and analysis of the test results.The design of protocol trigger and decoding hardware module has the characteristics of high development efficiency,low cost and good maintainability.