Research On Capacitorless Low Dropout Linear Regulator

As portable devices such as smart phones,tablets and smart wristbands are developing towards the direction of miniaturization and versatility,SoC has become a hot research area for IC designers.Due to the need of a large off-chip inductor for traditional DC-DC regulator,it is difficult for it to be fully integrated on chip.While the low dropout regulator(LDO)is widely used in various occasions owning to its easy to use and integrate.However,for traditional LDO which also needs a large off-chip capacitance to ensure the stability of the system loop,it is also difficult for it to be fully integrated on chip.As a result,LDOs which do not need off-chip capacitor are raised by researchers nowadays for SoC systems.On the other hand,due to the absence of large off-chip capacitor,there are many problems in stability and Transient response for capacitor-less LDOs,which raise more challenges for designers.So it has become a hot research area for designers to design a high performance capacitor-less LDO within limited power consumption.In this paper,the zero-pole distribution and frequency compensation method of the capacitor-less LDO are studied in detail,and the Q-reduction frequency compensation method is mainly studied and improved.Focusing on the power supply rejection(PSR)and load transient response performance of the capacitor-less LDO,this paper has carried on thorough research separately,and has proposed the corresponding improvement circuit.Because of the limitation of the system bandwidth,the PSR performance of the traditional LDO will rapidly deteriorate at high frequency.In this paper,the Negative Capacitance Circuit(NCC)is proposed based on the detailed analysis of PSR performance.In order to overcome the shortcomings of the transient response of the capacitor-less LDO,this paper presents a circuit based on Transient Pulse Detection(TPD),which improves the system transient response without increasing the static power consumption.In addition,as an important module in the LDO,the performance of the bandgap reference seriously affects the overall LDO characteristics,so a local negative feedback loop is designed for it to produce a local voltage,which significantly improves the PSR performance of the reference voltage,making the overall performance of the LDO circuit better.Based on the above research,a high-PSR,fast transient-response capacitor-less LDO based on GSMC 0.13?m RF process is designed for RF SoC systems.The detailed analysis and design flow of bandgap reference,bias circuit,error amplifier,PSR enhancement circuit and transient enhancement circuit is given and the circuit is simulated by Virtuoso software.It is shown that this LDO is able to work normally under the voltage range of 2-3.3V and the output voltage of 1.8V;The circuit can be stable with the load current ranging from 100?A to 50 mA and the PSR can still reach-69 dB @1kHz;When the load current changes from 100?A to 50 mA,the under shoot and over shoot voltages are 88 mV and 82 mV respectively.The minimum dropout voltage of this LDO is under 200 m V.