Research And Design Of A Wide Load And High Efficiency Step-Down DC-DC Converter

With the continuous development of social development and information technology,electronic products such as portable computers,mobile phones,and wearable devices have increasingly become the needs of people's lives,and the demand has exploded.The functions of electronic equipment are diversified and the size is small.When the capacity of lithium battery is limited and the demand for load current is increased,new requirements are also placed on the power management chip.How to realize low voltage and high current and improve the working efficiency of the chip and prolong The use time has become the design focus of the switching power supply.In order to meet the needs of the market and grasp the trend of the times,this paper proposes to design a wide-load and high-efficiency step-down DC-DC converter.The input voltage is 2.5V~5.5V,the clock frequency is 1.5MHz,the typical application input voltage is 3.3V,the output voltage is 1.8V,and the load current is 7A.The article first introduces the research background and the research status and development trend of DCDC converter,and expounds the significance of designing a wide-load high-efficiency DC-DC converter.Secondly,the basic theory of the working principle,working mode and control mode of the step-down DC-DC converter is introduced.Focus on the slope compensation in the current loop and the chip load capacity,high efficiency and other issues,design and verification of the key research modules and other key circuits and simulation analysis.Finally,the chip-level simulation analysis of the designed DC-DC converter is carried out.This paper focuses on the mechanism of subharmonic oscillation in the peak current mode current loop and the theoretical basis of slope compensation.The basic classification and implementation of the slope compensation circuit are explored.On the basis of eliminating subharmonic oscillation,research and Analyze the factors affecting the load capacity of the switching power management chip.In order to achieve the design goal of wide load and comprehensively consider the design of circuit system,this paper adopts a new type of piecewise linear slope compensation circuit,and proposes a technology to improve the load capacity following the slope clamp circuit and the improved summation circuit.In addition,based on the main power loss in DC-DC converter,this paper adopts multi-operation mode to improve the chip efficiency under light load,and design a high-precision lossless current sampling circuit to achieve wide load while reducing the full load range.Power loss.Chip-level simulation of DC-DC converter under BCD 1.8?m process verifies whether the step-down DC-DC converter works normally and whether the design of this paper meets the design requirements.The simulation results show that when the load is more than 10 mA,selecting the proper working mode can ensure that the chip efficiency is higher than 93%,and the efficiency is 94% in typical applications.With the loadcapacity improvement technology of this paper,the load capacity is improved by 26.4%.The above results show that the design goal is basically achieved.