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Hardware Circuit Design Of High Precision LXI Digitizer

Posted on:2020-10-11Degree:MasterType:Thesis
Country:ChinaCandidate:D Q KongFull Text:PDF
GTID:2392330596976564Subject:Engineering
Abstract/Summary:PDF Full Text Request
The digitizer can digitize the analog signal and process the digital information.It is one of the test instruments widely used in time and frequency domain.LXI centralizes the easy-using of GPIB,the high performance and small size of VXI,the flexibility and high throughput of ethernet.It is convenient to build a networked and distributed automatic test system.Therefore,the development of LXI digitizer is significant.The high-precision LXI dual-channel digitizer designed in this thesis achieves the maximum sampling rate of 100MS/s;10MHz analog bandwidth;and the system accuracy error is 0.03% when the input frequency is less than 1kHz.The digitizer is suitable for applications where the sampling rate of digital multimeter or the resolution of oscilloscope can not meet the test requirements.The details of the paper are as follows:(1)Design of the whole scheme of Digitalizer.Around the hardware system design of the digitizer,the thesis introduces the structure of LXI digitizer,and points out the important role of key circuits in the realization of the subject indicators.(2)Design and implementation of hardware circuit.The structure of analog frontend is introduced,and a low noise signal conditioning circuit is analyzed in detail.Through circuit testing and noise model analysis,the anti-interference performance of signal conditioning circuit is evaluated.Based on the linear calibration model,the calibration methods of bias error and gain error are analyzed,and a hardware self-calibration scheme of dualchannel and multi-gear is presented.(3)Clock jitter analysis and equivalent sampling circuit design.On the basis of discussing the generation,definition and classification of jitter,the thesis studies the clock nonuniformity in equivalent sampling.The method of phase delay is used to achieve low jitter delay.An application scheme of sequential equivalent sampling in high resolution sampling system is proposed.and proposes a method to further reduce the clock nonuniformity in equivalent sampling by time interval measurement.Through the debugging of the each functional module and the test of the performance of the whole system.The main performance parameters of the dual channel Digitalizer designed in the thesis,such as sampling rate,channel bandwidth,accuracy,etc,basically meet the requirements.Its low jitter sequential equivalent sampling clock scheme and self-calibration hardware method ensure the stability and reliability of the system.
Keywords/Search Tags:Digitizer, High Precision Sampling, Equivalent sampling, Clock jitter
PDF Full Text Request
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