Reseach On Key Technology Of Broadband Equivalent Sampling Oscilloscope

With the rapid development of the electronic technology, the frequency range of the signal to measure becomes wider and wider, it makes the higher sampling rate indispensable. In recent years, the real-time sampling technology based on the high-speed analog-to-digital converter(ADC) has made great progress; however, it cannot satisfy the need in various fields. With low real-time sampling rate, the equivalent sampling technology can achieve the extremely high equivalent sampling rate to make up the shortfall of the real-time sampling technology. The equivalent sampling is widely used in the broadband signal measurement. For instance, the oscilloscope with equivalent sampling can measure many kinds of broadband signals in time domain, such as microwave signal, optical signal, high-speed pulse, and etc.The equivalent sampling includes two types: one is the random equivalent sampling and the other is sequential equivalent sampling. The former can acquire the pretrigger information before the trigger event, so it has a wider application background. For a long time, it has been the research content of the scholars both at home and abroad. However, when the horizontal scanning speed increases and the time window narrows down, the traditional random equivalent sampling has a problem of long waveform reconstruction time and hard equivalent sampling improvement. Moreover, the bandwidth deficiency of the front-end signal conditioning circuit limits the bandwidth of the signal under test. The above-mentioned factors restrict the further application of the random equivalent sampling technology in the field of the broadband signal measurement.How to achieve high equivalent sampling rate and accurate reconstruction of the input signal with high bandwidth is the main research content of this dissertation. Combining the related projects during the period of pursuing the doctor’s degree, this dissertation does the deeply researches on the following aspects:(1) According to the architecture and the principle of the random equivalent sampling, the two key links(resolution of the time interval measurement(TIM) and the waveform reconstruction efficiency) which restrict the equivalent sampling rate improvement are analyzed. Based on the model of the multi-channel parallel random equivalent sampling model, the method to improve the waveform reconstruction efficiency is presented. The theoretical foundation of using broadband sampling holder to broaden the system bandwidth and the influences of the clock jitter on the random equivalent sampling are analyzed, and the data processing method to improve the signal-to-noise ratio(SNR) of the reconstructed waveform is discussed detailedly.(2) Design and implementation of the broadband signal conditioning channel. The architecture of the broadband analog front end is introduced and the method to determine the parameters of the separated path architecture-based impedance conversion circuit is analyzed in detail. For the shortage of the existing impedance conversion circuit, a type of programmable current source-based impedance conversion circuit is put forward to implement programmable calibration and improve the adaptive capacity with load. The relationship between the frequency response characteristic and the transient response characteristic is discussed, and based on the research of the frequency-domain compensation for the analog channel hardware, each part of the signal conditioning channel is compensated in frequency domain respectively, achieving the broadband signal conditioning channel with input frequency ranging from direct-current(DC) to 4GHz. According to the special demand of the equivalent sampling waveform reconstruction for the trigger signal and the relationship between the trigger signal frequency and the waveform reconstruction, a broadband trigger channel implementation scheme is presented.(3) Design and implementation of the low-jitter clock system. The impact of the clock signal on the sampling system performance is analyzed. Combining the need of the high-speed sampling holder and the multi-channel high-speed ADC clock circuit in the random equivalent sampling system, the method to design the low-jitter clock is studied. Based on that, the implementations of the 4GHz low-jitter sampling clock based on the frequency multiplication and the 2.5GHz low-jitter sampling clock based on the phase locked loop(PLL) are researched respectively. The testing results show that the frequency multiplication-based sampling clock features the jitter of 21 fs, while the PLL-based sampling clock has the jitter less than 150 fs.(4) Study of the high-resolution TIM technology based on the time-to-amplitude conversion(TAC). The high-resolution TIM is the key point of the waveform reconstruction, and the time measurement resolution restricts the maximal equivalent sampling rate. This dissertation analyzes the noise model of the TAC circuit, shows that the low-noise constant flow source is the key point to determine the TAC circuit measurement accuracy, deduces the mathematical formula of the measurement accuracy and presents the way to design low-noise TAC circuit. Based on the Miller integral TAC and aiming at the existing problems of low TIM speed and low waveform reconstruction speed, a TAC circuit based on the double constant flow sources architecture is put forward, which can improve the measurement speed significantly while guaranteeing the accuracy. After studying the reason of the temperature’s impact on the TAC circuit, an effective calibration method is presented to realize the TIM standard deviation of 1.5ps.(5) Based on the multi-channel parallel random equivalent sampling architecture, and combining the broadband signal conditioning technology, low-jitter sampling clock generating technology and the high resolution TIM technology, a random equivalent sampling oscilloscope with 1TSPS sampling rate and 4GHz bandwidth is designed, and the testing results are presented.