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Research On Low Power Buck DC-DC Technology

Posted on:2020-08-04Degree:MasterType:Thesis
Country:ChinaCandidate:H L NiuFull Text:PDF
GTID:2392330602950721Subject:Engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of electronic science and technology,intelligent mobile terminal products have gradually become a necessity in the public life.The portability of smart mobile electronics require a longer range of power supplies,which requires the power supply chips to have low power consumption characteristics.The traditional power management chips use a linear inefficient power supply,which cannot meet the characteristics of today's smart mobile terminal products.DC-DC converters are increasingly favored by IC designers because of its high conversion efficiency.This thesis briefly describes the research status of power chip,and analyzes the characteristics and application range of linear power supply and switching power supply,and then describes the architecture types of various switching converters.According to the research direction and application requirements,the control mode and modulation mode of low power buck converter are determined,the power consumption of the DC-DC converter is analyzed,and the low-power circuit module is designed.In the circuit design,the key technology of low power consumption is analyzed,the principle analysis,finally the whole simulation of the converter is carried out.According to the simulation results,the circuit is continuously debugged to realize the correct function of the circuit and satisfy the performance.The layout design and tapeout verification of the converter are completed.In this thesis,a low-power Buck DC-DC converter with peak current mode control is designed.The key technologies and circuit structures of low power consumption are studied.The main research results are as follows:1.The circuit structure is optimized to reduce the losses of the converter.In this thesis,the N-type power tube with larger carrier mobility is used in the design of the power tube,which reduces the area and the switching loss.The synchronous rectification technology is used to reduce the power consumption,and the dead zone control circuit is added to prevent the two switches from being turned on at the same time.The zero-crossing detection circuit is added to prevent the inductor current from being reversed.2.Low-power current sampling circuit design.The sampling circuit uses a small sampling ratio to achieve a low power consumption design,abandoning the low efficiency and inaccurate resistance sampling method,achieving nearly 1/20000 current sampling ratio.In addition,sampling accuracy is only affected by device matching and is not influenced by temperature and operating voltage.3.Low-power circuit of Power-saving mode design.When the output load current becomes very small,the converter automatically enters power-saving mode.In the power-saving mode,the power transistors are turned off to reduce switching loss and conduction loss,and most of modules are turned off to achieve low static power consumption during light loads.At the same time,the circuit of Power-saving mode does not adopt the traditional clamping circuit and comparator circuit,but adopts the clock signal to determine whether to enter the power-saving mode.This power saving mode control method reduces the number of modules and the power consumption of the whole system.4.Stepped soft-start control circuit design.The output voltage rises slowly by making the input voltage of the error amplifier step rise.The soft-start circuit avoids generating inrush current when the converter starts.5.The design of an on-chip frequency compensation circuit structure.By constructing a capacitive resistor network between the input and output of the error amplifier,the frequency compensation of the converter loop is realized,the influence caused by the output load change on the stability of the system is eliminated.The on-chip loop compensation reduces the pins of the converter chip,saving PCB area.The circuit design of the low-power buck converter is based on the CSMC 0.18?m 80 V BCD process.The circuit design and simulation verification are performed using Cadence EDA software and Spectre simulation tools respectively.The layout is completed using Cadence layout software,and the tape is completed and tested.The results show that the converter's functions are normal and meet the design performance specifications,the maximum conversion efficiency is 93%.
Keywords/Search Tags:Buck converter, Power saving mode, Sampling current circuit, Soft start circuit, Low power consumption
PDF Full Text Request
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