Research And Design Of A Wide Input Range Low Noise LDO Linear Regulator

Among many battery-powered portable devices,the power management system plays a vital role and directly affects the overall performance of the system.As a power management chip,LDO is widely used because of its small size,low cost,low output ripple and noise,and high stability.With the increasing demand for low noise,wide input range applications,more and more portable applications use low noise,wide input range regulators as their on-chip power supplies.Therefore,it is of great significance to research and design a low noise LDO linear regulator wi th a wide input voltage range.This thesis studies and designs a low noise LDO linear regulator circuit with a wide input voltage range.Firstly,the basic structure and circuit principle of LDO linear regulator are studied.According to the design goal,based on the TSMC 180 nm BCD process,the design of the LDO linear regulator and the layout of key modules were completed.Compared with the traditional wide input range LDO,which uses a high-voltage tube on each current branch to achieve a wide inpu t range voltage,this paper designs a high-voltage pre-modulation module,which reduces the high input voltage of 5?20V to 4V to power the LDO core circuit.,So as to avoid using a large number of high-voltage tubes to save layout area and reduce power consumption;the power adjustment tube uses high-voltage PMOS tubes to achieve low dropout,low noise,and can adapt to a wide input voltage range;by analyzing the LDO linear regulator Noise characteristics,design a low-noise structure bandgap reference and low-pass filter the reference output.Compared with a current reference with output buffer,it achieves low noise and lower power consumption.The error amplifier uses a two-stage structure.The first stage adopts OTA structure,and the second stage adop ts common source amplifier to achieve lower output noise and smaller output equivalent impedance to avoid the occurrence of low frequency poles;the second stage is a high voltage resistant amplifier to avoid power adjustment tube grid The source is broken down;in addition,over-current protection and over-temperature protection circuits are designed to prevent damage to the chip in extreme conditions.Based on the TSMC 180 nm BCD process,this article uses Cadence Spectre simulation software to simulate and verify the designed LDO linear regulator.The simulation results show that the designed LDO linear regulator can be regulated to 1.5V in a wide input range of 1.8V?20V,and the output integrated noise is 32.897?Vrms in the frequency range of 10Hz?100KHz,and the low-frequency PSRR is 79.74 d B,PSRR at 10 KHz is still 40.58 d B,which meets the design requirements.Finally,the simulated gain after the error amplifier is 58.94 d B slightly lower than the previous simulation.The unity gain bandwidth and phase margin are almost the same as the previous simulation.The simulated temperature performance after the bandgap reference meets the application requirements.