Research And Design Of A Low Dropout Linear Regulator

With the advent of the information age, more and more high-end portable devices continue to come out. For example: MP5 player, digital cameras, smart phones, PDA, etc. They cause power management technology continuous innovation. Other portable devices on the power supply rejection ratio, power consumption, noise, etc, have put forward higher requirements. Because of LDO's small area, power supply rejection ratio, low power consumption, noise, etc, much favored by designers of portable devices. In addition, LDO external circuit is simple, cost-effective, highly integrated, making it more suitable for portable devices. But, our country's power management chips most need to be imported, therefore research and development with independent intellectual property rights of the LDO imperative.Taking positive design is given priority to, the reverse is complementary, IC foundry both domestic and combining the current situation of the Angle of the design requirements. Optimizes circuit structure and parameters, this paper put forward a general framework design of the circuit. Low dropout linear regulators, including the core circuit benchmark voltage source, error amplifier and its control circuit and the feedback network adjustment components and resistance. This constitutes a negative feedback circuit structure of a few parts, realized LDO transformation function. In order to guarantee circuit work safety, also designed the over-voltage protection circuit and output voltage protection circuit. Output voltage protection circuit USES comparator, Schmitt toggle and a series of inverter realization, prevent circuit in the provision of voltage output point frequently open or shut off nearby.Paper by using Cadence software and Hspice software realize the circuit design and simulation. After completing the circuit design, the Cadence of Virtuoso integration tools are given, and using the map layout design of DRC, LVS validation tool territory are verified, so as to ensure the correctness of the territories. The simulation shows that this section of low-dropout linear regulator's input voltage range of 5.3V-7V, the output voltage can be stabilized at 5V. But also has better temperature characteristics and high power supply rejection ratio. Simulation results show that when the maximum load current in the case of 50mA, the minimum pressure of only 300mV, the output voltage accuracy of 0.1%. Full compliance with design specifications, the LDO chip is mainly used for a number of MAU for the circuit to provide reliable power support.