Design Of High-Speed Low-Distortion Single-Supply Cmos Operational Amplifier For Intelligent Hardware Application

As an essential part of smart hardware usage,op-amps are increasingly in demand for their performance in various applications.Amplifiers with high bandwidth and low distortion are required for high-speed,high-precision data acquisition.As an important indicator of operational amplifier performance,the variation of transconductance can cause distortion of the signal and greatly affect the gain of the loop and the frequency compensation of the opamp.For this reason,this paper designs an operational amplifier with wide bandwidth and constant transconductance,and requires the input/output of the operational amplifier to be close to rail-to-rail to ensure its higher reliability in the field of high-speed and highprecision data acquisition.In this paper,we design a constant transconductance rail-to-rail operational amplifier based on charge pump high voltage internal power supply for high speed and high precision data acquisition.The input stage adopts PMOS differential pair structure,and the internal power supply of the input stage is generated by the charge pump above the supply voltage,so that the op-amp can operate properly in the rail-to-rail input range and keep the input transconductance constant.The clock signal required by the charge pump circuit is generated by the internal oscillator circuit,and then the non-interleaved switching control signal of the required level is generated by the voltage bootstrap circuit and timing circuit,and finally a continuous and stable high-voltage internal power supply which is output using the timeinterleaved structure.An auxiliary switch combined with a following op-amp structure is also used in the charge pump implementation to reduce the burr of the main switch during switching.The op-amp uses a gain bootstrap structure in a folded common-source commongate structure to increase the overall gain,and a Class AB structure in the output stage to achieve rail-to-rail output.The high gain bandwidth is achieved with multiple PMOS differential pairs in parallel;low distortion is achieved with a new rail-to-rail input structure to obtain constant transconductance;a comparator is used to clock the charge pump;the bandgap reference circuit uses a proportional to absolute temperature(PTAT)current generation circuit,a complementary to absolute temperature(CTAT)current generation circuit,and a reference output circuit;and the op-amp is frequency compensated with Miller compensation to improve the stability of the op-amp.The frequency compensation of the operational amplifier is performed by using Mille compensation,thus improving the stability of the operational amplifier.In this paper,the circuit design and layout are based on 0.5μm CMOS process according to the application requirements,and the pre-simulation and post-simulation of the circuit are carried out with the help of EDA simulation software.The simulation results show that the input/output voltage swing of the op-amp can basically achieve rail-to-rail.At an ambient temperature of 25°C and a supply voltage of 5V,its input stage transconductance is 139.1μS,the input stage transconductance in the rail-to-rail input common-mode voltage range is5.7%,the open-loop voltage gain is 150.76 d B,the unit gain bandwidth is 53.407 MHz,the phase margin is 96.1°,the common-mode rejection ratio is 119.8d B,and the voltage swing rate is about Finally,the flow processing and testing of the overall circuit are completed,and the measured data of the chip are close to the simulated data,and the main parameters have reached the expected index.