The Research And Design Of Millimeter-Wave Low Noise Amplifier

With the increasing requirement for high-speed wireless communication systems and continuous improvement of process technology,millimeter-wave technology has been rapidly developed.The demand for millimeter-wave hardware is also getting higher.Low-noise amplifier(LNA),a part of high-speed wireless communication system,has a significant impact on the performance of the entire systerm.This thesis summarizes the research progress of the millimeter-wave LNA integrated circuit,and makes a basic analysis and discussion of its basic theory and challenges.Finally,based on the 65 nm CMOS process,two LNAs are designed operating in the millimeter-wave band.This thesis first states the development of wireless communication system,and illustrates the status quo of it.According to the characteristics of millimeter wave,the application of millimeter wave in various fields is briefly introduced.The importance of using silicon-based process to design integrated circuit is emphasized.Then the research significance of millimeterwave LNA and the research status of silicon-based millimeter-wave LNA at home and abroad are expounded.The design features of millimeter-wave band LNA are summarized.Secondly,this thesis discusses the basic theory of LNA circuit design in detail.Aiming at the design challenges of the current millimeter-wave LNA circuit,the characteristics of the passive and active devices used in the circuit design process are introduced in detail from the theoretical point of view.In addition,this thesis detailedly describes the main performance indicators of LNA,and describes the main structure of it.Besides,the noise of each structure and issues that need attention in the design of LNA are analyzed,which provide a theoretical basis for the design of millimeter-wave LNA circuit.Finally,based on the 65 nm CMOS process,two LNAs was designed.According to the above theory,this thesis first designed a LNA operated at 140 GHz.The LNA uses three cascoded single-ended cascode,and a gain boosting technique is used to relieve the problem that the gain of the MOS transistor at high frequency is not high.The matching network uses microstrips and capacitors.All microstrip and metal connections are emulated and optimized in ADS(Advanced Design Systerm)Momentum to take their parasitics into account.The postsimulation results show that a 12 d B small signal gain and a 11.7d B noise figure are realized at working frequency of 140 GHz,Total layout area is 0.3mm2.Then a 160 GHz LNA was designed to modify the 140 GHz LNA noise performance,and to further improve the operating frequency.This LNA consists of first-order single-ended cascode and two-stage differential cascode structure to suppress the external interference while not having poor noise performance.Onchip transformers are used for signal transmission and matching between differential circuit structure.Between the single-ended circuit and the differential circuit and the differential output,the on-chip balun structure is used to achieve single-ended to double-ended input and doubleended to single-ended output,respectively.In order to further optimize the noise performance,this design also uses noise reduction technology.The post-simulation results show that the LNA achieves a gain of 13.8d B at 160 GHz with a noise figure of 7d B and a total layout area of 0.3mm2.Compared to 140 GHz LNA,this design achieved a substantial increase in noise performance,completing the initial design goals.