| The continuous improvement of hardware and software technology has made the image processing system widely used in industrial automation,safety,healthy and traffic control.In order to complete the functions of each system,the most important and most challenging of these applications is the real-time requirement of the system.Field programmable gate array(FPGA)with parallel structure,whose hardware is capable of high-speed parallel processing of data,is widely used in these systems.However,most kinds of application software are based on the operating system running under the structure with the CPU or MCU.Those sequential programs will bring significant time delay in dealing with large amounts of data.Programmable system-on-chip(SOC)integrated FPGA and MCU core can be used to reduce the difficulty of the system hardware and software co-design.The designer can make reasonable division of hardware and software based on corresponding functions in order to improve the real-time ability of the system.Good hardware and software co-design can dramatically enhance the system real-time performance.Based on the study of typical image processing system both at home and abroad,this thesis designs a real-time image processing system on the Zynq SoC platform.The gray-scale conversion and convolution operation are implemented by the method of the hardware and software co-design,and applied to the image to achieve such as edge detection,sharpening and bluring processing.The system realizes real-time gray-scale conversion,edge detection,blur and sharpening of 320 * 240 images.In this thesis,the convolutional coprocessor is designed with a built-in phase-locked loop with frequency of 150 MHz to process a single frame image with pixels of 76800(320 * 240).At a single pixel / clock cycle rate,the processing time of one frame is about 0.51 mS.The corresponding coprocessor image processing capability can be as high as nearly 2000 FPS(frames / sec).But the address mapping based AXI bus requires 25 mS to transmit a frame,so the system can complete 40 FPS real-time throughput.The innovation of this thesis is summarized as follows:Firstly,the overall framework of hardware and software co-processing is designed according to the function and performance requirements of the system.The system can be realized by three pipelines: image acquisition(operating system),image processing(hardware algorithm)and image output(hardware).It is worth noting that this thesis uses the FGPA VGA control module to output the final image.The same function can also be realized by the operating system under the system software.Two ways are both very well-established technology,so there is no further explanation.Secondly,the C software based on the video library of Linux drives the USB camera to obtain video image information.It can avoid employing the hardware of FPGA to process video images from the USB camera,which needs to design the specific hardware interface driver for processing the video source.And it also not only simplifies the circuit design,speeds up the system design cycle,but also increases the flexibility of the system.Of course,the video image information can also be pre-existing SD card,as Zedboard is with SD card slot.Thirdly,the inter process communication(IPC)is designed to realize the acceleration.The image storage module(IM)stores the original image and the processed image information respectively.The system reads the original image from the IM.The processed image pixel information is written back to IM then.The Image Storage Controller(IMC)communicates both IPC and IM in both directions.In particular,the algorithm hardware structure of 3 * 3 convolution,3 * 3 convolutional elements and various 5 * 5 convolution functions is discussed in detail for the convolution operation in IPC.Finally,this thesis builds the experimental platform of the image processing system.The system is based on the Zedboard + USB camera + monitor.The image information of the camera is processed by Zynq SoC on Zedboad,and the display is displayed in real time.The acquired data provide a direct basis for further technical improvement. |
