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Study And Design Of A Reconfigurable Σ-Δ Modulator

Posted on:2020-02-24Degree:MasterType:Thesis
Country:ChinaCandidate:S L CaoFull Text:PDF
GTID:2428330578959471Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
In the era of the Internet of things,sensors are gradually developing towards integrated and multi-signal modes.The signals received by sensors show diversified characteristics,and the requirements of Analog to Digital Converter in terms of accuracy,speed,bandwidth,power consumption and other indicators are also becoming increasingly diverse.In order to simplify the design and improve the integration degree,the multi-channel ADC integrated with a single chip is often used in the traditional integrated sensor for the conversion of multiple signals.The performance of a single channel ADC must meet the highest requirement among all the tested objects,although the high-performance ADC is not needed for most tested objects.This will undoubtedly lead to large power consumption,large hardware resource consumption and unnecessary redundant data processing.Targeted sampling ADC,this paper,study and design of the reconfigurable Σ-Δ modulator,for the realization of the precision and speed of the reconfigurable ADC lay the foundation.In this thesis,the basic structure and performance characteristics of existing reconfigurable ADC is analyzed first.Comparisons by classification and combined with the Nyquist ADC and the characteristic of the Σ-Δ ADC,Σ-Δ ADC is chosen to implement reconfigurable technology.Then,by comparing the advantages and disadvantages of single-loop Σ-Δ modulator and cascade Σ-Δ modulator,determines the cascade Σ-Δ modulator as the basic structure of reconfigurable modulator;Considering the speed,accuracy,power consumption and so on various aspects factor,the order and oversampling rate of theΣ-Δ modulator are selected as reconfigurable parameters.The control signal is generated by the reconfigurable control circuit,and the modulator can realize the reconfiguration of 16 bit /2-1 cascade structure and 14 bit /2-2 cascade structure by controlling the working state of the last level integrator,the signal bandwidth of the two modes is 20 KHz and 50 KHz,respectively.Then,the effects of various non-ideal factors on the modulator are analyzed and verified by simulation,including the nonlinearity of the switch,kT/C noise and the finite DC gain of the operational amplifier,etc.To provide direction for the subsequent circuit design.Finally,based on the CSMC 0.5 um CMOS process completed the reconfigurable Σ Δ modulator of key circuit design and simulation.Simulation results show that under the working condition of 5.12 MHz clock frequency and 5V power supply voltage,the system can achieve the reconfigurable working mode of 16 bit/ 20 KHz and 14 bit/50 KHz,which is very suitable for the sensor application.
Keywords/Search Tags:Reconfigurable ADC, Cascade Σ-Δ modulator, Non-ideal factor, Switching-capacitance integrator
PDF Full Text Request
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