Scanning probe microscopy and oxidation of silicon at breakdown voltages

The growing importance of Scanning Probe Microscopy (SPM) as a tool for nanofabrication is opening many avenues in lithography nano-science. One type of Scanning Probe Lithography involves electrochemistry at the tip/substrate interface. Atomic Force Microscopy (AFM) with conductive tips and substrates was used in our study to both pattern and image those patterns on silicon substrates. Our long-term objective is to design and fabricate micron-scale patterns of nanometer sized spots on silicon chips that can serve as attachment sites for DNA based nano-arrays. In order to fabricate such substrates a study of the underlying electrochemistry was required. A most promising approach to preparing patterned silicon chips was introduced by the work of Dagata et al., using AFM to locally oxidize silicon surfaces and create controllable nanometer scale features. This thesis reports the determination of the influence of voltage and holding time on oxide growth for three different surfaces, native oxide layers, hydrogenterminated silicon surfaces, and silicon surfaces functionalized with ultrathin organic films. Both line and dot patterns were generated at several selected voltages and exposure times. In order to evaluate current efficiency, current was measured during line production. Oxide growth correlates with voltage until it reaches a saturation potential. This saturation appears to be associated with the onset of alternative conduction processes.