| Although power is of great concern, the main driving force in high-end microprocessor design is still performance. To achieve high performance for the broadest set of applications, many complex architectural features are included in these general-purpose, high-performance microprocessors. While the goal of overall high performance is generally met, it comes at a cost of high power dissipation. Moreover, different applications may vary widely in their degree of instruction-level parallelism (ILP), their branch behavior, and/or their memory access behavior. As a result, the datapath resources required to implement these complex features may not be optimally utilized by all applications; however, some power will be dissipated by these resources regardless of their utilization.; To better address power concerns, a good design strategy should be flexible enough to dynamically reconfigure available resources according to the application's needs such that extra power is dissipated only when it is really needed. In this thesis, we focus on power-aware solutions for the datapath resources in a high-performance, out-of-order superscalar microprocessor and show three dynamic solutions. First, we proposed a hardware mechanism to adjust integer and/or float point pipelines during runtime to save power using feedback from hardware performance monitors. Second, we designed three dynamic schemes that partition the issue queue into FIFOs such that only instructions at the head of each FIFO may request to issue. Then, we can vary the number and/or size of FIFOs based on feedback from performance monitors according to the application's runtime needs. Last, we introduced a dynamic closed-loop feedback control system to schedule resources in a general-purpose microprocessor for multimedia workloads. The control system defines a target metric and a way to measure the error distance between the target and actual values. This way hardware resources can be dynamically scheduled based on the online error distance.; In general, the main goal of this thesis work is to reduce energy and/or power without introducing undue performance loss in high-performance, out-of-order superscalar microprocessors. To obtain this goal, we proposed to utilize datapath resources in a more effective way, i.e., disabling structures whenever they are indicated to be non-critical for high performance. |
