High-efficiency low-voltage DC-DC conversion for portable applications

Motivated by emerging portable applications that demand ultra-low-power hardware to maximize battery run-time, high-efficiency low-voltage DC-DC conversion is presented as a key low-power enabler. Recent innovations in low-power digital CMOS design have assumed that the supply voltage is a free variable and can be set to any arbitrarily low level with little penalty. This thesis introduces and demonstrates an array of DC-DC converter design techniques which make this assumption more viable.; The primary design challenges to high-efficiency low-voltage DC-DC converters are summarized. Design techniques at the power delivery system, individual control system, and circuit levels are described which help meet the stringent requirements imposed by the portable environment. Design equations and closed-form expressions for losses are presented. Special design considerations for the key dynamic voltage scaling enabler, called the dynamic DC-DC converter are given. The focus throughout is on low-power portable applications, where small size, low cost, and high energy efficiency are the primary design objectives.; The design and measured results are reported on three prototype DC-DC converters which successfully demonstrate the design techniques of this thesis and the low-power enabling capabilities of DC-DC converters in portable applications. Voltage scaling for low-power throughput-constrained digital signal processing is reviewed and is shown to provide up to an order of magnitude power reduction compared to existing 3.3 V standards when enabled by high-efficiency low-voltage DC-DC conversion. A new ultra-low-swing I/O strategy, enabled by an ultra-low-voltage and low-power DC-DC converter, is used to reduce the power of high-speed inter-chip communication by greater than two orders of magnitude. Dynamic voltage scaling is proposed to dynamically trade general-purpose processor throughput for energy-efficiency, yielding up to an order of magnitude improvement in the average energy per operation of the processor. This is made possible by a new class of voltage converter, called the dynamic DC-DC converter, whose primary performance objectives and design considerations are introduced in this thesis.