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Design Of Satellite High Speed Load Data Simulator

Posted on:2022-03-12Degree:MasterType:Thesis
Country:ChinaCandidate:Y SunFull Text:PDF
GTID:2492306314969789Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
In the whole remote sensing satellite system,the payload on the satellite is the most core subsystem.But satellite payload subsystem research and development of high technical difficulty,research and development cycle is long,input cost big,at the beginning of the satellite development,the corresponding digital subsystem and some ground testing system requires a lot of testing and debugging work,in order to avoid because of frequent tests to manipulate result in the damage of the payload and ensure the smooth progress of the research progress of the whole system need to design a high-speed ground test equipment instead of the payload accordingly testing tasks.The load data simulation source developed in this project is an important part of the ground test system.During the test process,the load data simulation source can process the simulation source data provided by the upper computer into the required rate and timing sequence according to the specified channel.In this paper,on the basis of fully investigating the development and status quo of load data simulation sources at home and abroad,the development of load data simulation sources is carried out,and the overall design scheme is formulated in combination with the overall demand.PXIe hardware architecture was selected as the basis of load data simulation design.Then,according to functional requirements and technical indicators,design analysis was carried out,and a hardware and software design scheme that met the requirements was proposed.Hardware design is mainly divided into four parts,namely,core control part,memory storage circuit,isolation chip part and LVDS interface circuit part.Xilinx Kintex Ultra Scale series FPGA chip is selected as the core controller.After analyzing the price,volume,speed and other factors of the existing memory,the design scheme of 4 pieces of DDR4 memory is selected.When processing the simulation data sent by the upper computer,the self-built IP core scheme was selected.The encapsulated IP core,Microblaze embedded soft core and XDMA IP core were connected through AXI4 bus to complete the construction of the underlying logic.In terms of software design,FPGA PS terminal program design was completed,PXIe interface driver development was realized,and upper computer software design was completed.After the design of load data simulation source is completed,it is tested,including single board test and ground test link joint test.The single-board test mainly focuses on the self-built IP logic test for load data simulation source,DDR4 memory read-write test and PXIe interface functional test.Under the condition of meeting the conditions of test environment,all data channels have zero error code.Finally,the quality of data signal is tested.According to the test results,the load data simulation source card data transmission is stable without error phenomenon,the number quality meets the design requirements,and can be perfectly applied in the project to complete the ground test task.
Keywords/Search Tags:PXIe, Xilinx FPGA, DMA
PDF Full Text Request
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