Design And Implementation Of High Speed Data Recording Device Based On Aurora

In the flight test test,the main task of the data recording device is to receive and store data reliably and quickly.With the continuous development of aircraft testing technology,the accuracy requirements for the determination of various state parameters of the aircraft,the determination of the target position,and the testing of the environment have become higher and higher,and various imaging devices such as high frame rate and high resolution have to be introduced.These devices generate a large amount of data in a short period of time,which makes the amount of data collected and recorded in flight test tests larger and larger,and puts forward higher requirements on the transmission speed and storage capacity of the data recording device.This subject is based on "the research and development task of a high-speed data recording device of an aerospace institute".It mainly designs and implements the high-speed reception and high-speed storage of high-speed and large-capacity data,as well as the monitoring and storage of 1553 B bus data volume.The specific work of the thesis is as follows:First of all,for the task of developing a high-speed data recording device for this subject,after combing and analyzing its realization functions and technical indicators,based on high-speed serial communication technology,adopting the principle of modular design and reliability to formulate the task requirements for the realization of the functions and technical indicators of the device Detailed overall design plan.Secondly,the hardware circuit design is carried out on the key modules and interfaces of the high-speed data recording device,including SRIO interface circuit,Aurora interface circuit,1553 B bus interface circuit,DDR3 circuit,clock circuit,and power supply circuit.The SRIO interface and Aurora interface hardware are implemented based on the high-speed Serdes module integrated inside the FPGA.The SRIO interface circuit receives high-speed image data from the telemetry equipment;the Aurora interface circuit transmits the data to the memory module for storage;the two interfaces use DDR3 to cache high-speed data;the1553B bus interface circuit is responsible for monitoring and receiving 1553 B Bus data;the power supply circuit provides a reliable secondary power supply for the entire high-speed data recording device.Then the Aurora interface logic,1553 B bus interface logic and NAND FLASH storage logic of the high-speed data recording device are designed,and the data transmission process and the logic control of each interface are analyzed in detail.Finally,by building a hardware platform,the high-speed data recording device is tested for basic functions and data transmission reliability.After all the tests are passed,the high-speed data recording device is verified in the actual flight test.