Design Of High Reliability Multi-parameter Telemetry Data Recording System

In the 21 st century today,all countries in the world attach great importance to the research and manufacture of high-tech weapons and equipment,and the situation of modern warfare has changed from the previous full coverage of firepower to precision strikes.Relying on the requirements of a certain type of aircraft test system,it is necessary to design a telemetry recording system that can receive and record various dynamic parameters of the equipment in real time and accurately during flight.After the test,the hard recovery of the equipment is completed through the positioning system,which provides scientific data support for the next stage of performance improvement and troubleshooting.Therefore,this paper proposes and designs a high-reliability multi-parameter telemetry data recording system.Based on the relatively mature data recorder technology that has been used in the aerospace field,the hardware modular design closely focuses on functional and technical requirements.Appropriate selection,debugging and verification of domestic components are carried out,and dual-redundancy design methods are adopted for memory and optical fiber communication,which ensures high-reliability hardware circuit design.The logic design adopts a variety of digital interfaces to realize the reception of various telemetry data of PCM（Pulse Code Modulation）,image and Beidou module;Through mixed framing for unified data cache,the possibility of polling FIFO（First In First Out）status overflow and suitable capacity design were analyzed;The basic functions of NAND FLASH under single LUN plane operation are realized through the USB（Universal Serial Bus）debugging module;The RS（Reed-Solomom）codec is researched and designed,which realizes the error detection and verification of random errors generated in the process of reading and writing,and introduces the feedback mechanism of the handshake/request retransmission command,which greatly enhances the reliability of the return and reception of stored data;The highspeed,low-bit error rate data transmission is realized by using the GTX（Gigabyte Transceiver）transceiver and photoelectric conversion module inside the FPGA.After building a systematic closed-loop test platform,the key technologies of the recorder and the optical transmission system are researched and multi-faceted functional verification.After the GTX transceiver data communication test,it shows that the high-speed optical transmission link has good performance;the data recording system cooperates with the ground monitoring station and the host computer to complete the analysis and visual display of the working condition information through Gigabit Ethernet.After reading back and analyzing the analog recorded telemetry data,the high reliability of the system’s acquisition,editing and storage function is verified.Finally,the problems in the joint test process are analyzed,and feasible solutions are proposed.The results show that all the functional indicators of the data logger have reached the expected design requirements and can be put into engineering use.