The Design Of A High Capacity UAV Flight Data Recorder

Flight data recording (FDR) system is an important part of avionics system. With the developmentof science and technology, the complexity of UAV system is improving quickly, the requirements ofthe storage speed, capacity, and reliability for the UAV flight data recording system are also gettinghigher and higher. How to develop a high quality flight data recording system, to achieve the reliableflight data storage is the key issue of this paper.The research objective of this paper is to realize a high capacity FDR used in UAV system. On thebase of the introduction of current research situation and the development trendency in inland andforeign, according to the features of UAV system, this paper present the system design principles andimplementation scheme of the UAV FDR, then it also present the software and hardwareimplementation process of all the function modules. Finally, this paper put forward the improvementscheme based on prophase scheme and research result.The FDR use FPGA as core controller; use RS422bus as the system data bus to collect varioustypes of flight data from the flight control computer; use two chips of SRAMs as the caching media toachieve data cache; use cascaded NAND Flash as the storage media, it has high storage capacity andlong data retention; use USB as the unloading interface, this interface has high unloading rate andhigh reliability; used PC as the data preprocessing platform, to achieve the data unloading and flightdata processing. In this paper we particular elaborate the interface implementation principle; the read,write and erase operation of the NAND Flash; the dynamic bad block management and data validationmethod of the NAND Flash. Finally we also elaborate the flight data processing theory and thealgorithm implementation method.All the works discussed in the paper establish a firm foundation for the development of the UAVs’sFDR in future and also has useful reference for other recorders.