Research And Design Of ADC And Analog Baseband For 24 GHz Dual-mode Automotive Radar

The widespread of automobiles has caused frequent traffic accidents.In order to improve the driving experience of automobiles and improve driving safety,advanced driver assistance systems(ADAS)have emerged.The normal operation of ADAS relies on the acquisition of information about the surrounding environment by the vehiclemounted radar.With the advantages of high sensitivity,large dynamic range,and strong environmental adaptability,the millimeter-wave radar has become the preferred implementation scheme of the vehicle-mounted radar.Based on a fully integrated 24 GHz frequency modulated continuous wave(FMCW)and Doppler dual-mode millimeter wave automotive radar system,this paper uses 55 nm CMOS technology to design a high-precision,low-power sigma-delta analog-to-digital converter(ADC)and a high dynamic range,high linearity analog baseband(ABB).The main research contents are as follows:(1)Researched the papers about millimeter wave automotive radar chips published in recent years,analyzed the basic working principles of FMCW radar and Doppler radar,and aimed at this article’s 24 GHz FMCW /Doppler dual-mode automotive radar system’s measurement requirements of speed and distance,combined with the spread loss of millimeter-wave,RF front-end link budget and other conditions,the corresponding design indicators of ADC and ABB are given.(2)A high-precision,low-power continuous time sigma-delta ADC is designed.The Matlab Sigma-Delta Toolbox tool is used for calculation and analysis,and the Matlab Simulink simulation tool is used for system modeling,simulation and coefficient adjustment.The Sigma-Delta modulator finally adopts a fourth-order feedforward structure,which can reduce the performance requirements of the op amps except the first-stage integrator,thereby saving power consumption.Through local feedback,a resonator is formed in the loop,the position of the zero point of the noise transfer function is changed,the zero point is optimized,and the in-band noise suppression effect is improved.The summing circuit adopts a passive structure,which can further reduce power consumption.The modulator uses 1 bit quantization,and the1 bit quantizer corresponds to a 1 bit feedback digital-analog converter(DAC),which can avoid the non-linear problem caused by the multi-bit DAC.The 1-bit quantizer is implemented by a comparator.The comparator adopts a dynamic latch structure,which has the advantages of fast comparison speed and low power consumption.The layout area of the core part of Sigma-Delta ADC(IQ channels)is 340μm×252μm.The postsimulation results show that under the TT corner and 40℃ simulation conditions,the sampling frequency is 25 MHz,and the signal frequency is 158.6914 k Hz,ADC’s signal to noise and distortion ratio(SNDR)is 74.1 d B,and effective numbers of bits(ENOB)reach 12 bit,the power consumption is 0.982 m W.The simulation verification of each process corner was carried out at three temperatures of-40℃,40℃ and 120℃.The simulation results showed that under each set of simulation conditions,the ADC can achieve a dynamic range of more than 66 d B,and the power consumption is less than1 m W.(3)An ABB with high dynamic range and high linearity suitable for the FMCW/Doppler dual-mode radar system is designed.The low-pass filter is composed of two stage modified Tow-Thomas biquad to achieve independent adjustment of gain and bandwidth.Based on the 7-bit programmable current-mode analog-to-digital converter(IDAC),a digital-analog hybrid DC cancellation circuit using successive approximation logic is implemented,which can eliminate the mixer output and baseband itself under the condition of extremely low intermediate frequency signals in Doppler mode without introducing off-chip capacitors.By the mixing use of the BJT in the op-amp and the IDAC,the influence of flicker noise was reduced,which improved the low-frequency noise performance of ABB.The ABB core layout area(IQ channels)is 987μm×602μm.The post-simulation results show that under the TT corner and40℃ simulation conditions,the gain range of the ABB in two modes is 4 ～ 62 d B,and the maximum linear input amplitude(IP1d B)is 10 d Bm.In FMCW mode,the noise figure is better than 27 d B,and in Doppler mode,the noise figure is better than 42 d B.Monte Carlo simulation results show that when the input has 400 m V DC offset(FMCW mode)and 200 m V(Doppler mode),the ABB’s output DC offset is only 21.3m V and 16.4 m V.The simulation verification of each process corner is carried out at three temperatures of-40℃,40℃ and 120℃.The simulation results show that under each set of conditions,ABB can cover the target gain range of 6 ～ 58 d B,the noise figure of ABB in FMCW mode is better than 44 d B,and the noise figure of ABB in doppler mode is better than 58 d B.Cascade simulation of ABB and ADC has also finished.Under the TT process corner and 40℃ simulation conditions,when the ABB input signal frequency is 158.6914 k Hz,and the ADC’s sampling frequency is 25 MHz,the final output spectrum of ADC shows that the SNDR is 70.8 d B and the ENOB is11.5 bit.In addition,the test work is preparing,mainly including the formulation of ADC and ABB’s test plans,the preparation of related test instruments,and the drawing of test PCB.