Design Of Signal Acquisition And Storage Module Of USB Oscillographic Analyzer

As a representative of modern electronic measuring instruments,digital storage oscilloscope undertakes the important task of testing and analyzing complex signals in integrated circuits.Desktop digital storage oscilloscopes are not always the best choice due to the diversity of test environments.For some complex test sites,such as narrow environments or outdoors,it will be very convenient to use a multi-functional portable measuring instrument.The USB oscillographic analyzer in this design is a small test system based on the principle of signal generation and collection,with the characteristics of portability and multi-function.The signal acquisition and storage module of USB oscillographic analyzer is an important part of Oscillographic analyzer,which almost determines the acquisition and storage performance of the whole test system.In this thesis,the signal acquisition and storage module of USB oscillographic analyzer is discussed,and the schema analysis and design implementation of the acquisition and storage module are completed,and the design results are tested and verified.The main contents of this thesis are as follows:1.The hardware circuit design of the acquisition and storage module is completed.The ADC2700,an analog-to-digital converter chip,is selected for the real-time sampling rate of single channel 5 GSPS and the 12 bit vertical resolution.The configuration of ADC is discussed from front-end driver,impedance matching and level standard.Based on this,the data transmission and control circuits between the FPGA and ADC,DDR SDRAM are designed.Finally,a reasonable power and clock circuit is designed to meet the different power and clock requirements of each module.2.The sampling data receiving module is designed based on JESD204 B serial protocol.The sampling data acquired by ADC is sent to the FPGA at 10 G bps link rate through JESD204 B serial protocol.The data link is successfully established and sampling data reception is completed by correctly configuring the JESD204 B IP core in the FPGA.The 256 bit sampling data received is unmapped to obtain the original 20-way parallel240 bit sampling data.3.Data processing and storage modules are designed in FPGA.According to the time base table of the USB oscilloscope analyzer,the parallel data extraction module is designed,and finally the switching of different time base gears from 2 ns/div to 50 s/div is realized by sending different extraction and interpolation multiples from the host computer.Based on the arbitrary wave generation function,the corresponding trigger function is designed in combination with the quantization process of its output amplitude.An on-chip storage module is designed in the field of field programmer to temporarily store sampled data.At the same time,three suitable external DDR3 SDRAM memory are selected by calculating the storage capacity and data transfer rate.A large-capacity memory module is designed to store data in the external memory,which meets the requirement of 1 Gpts storage depth.Through the testing and verification of various functional indicators of the signal acquisition and storage module of the USB oscillographic analyzer,it is shown that the highest real-time sampling rate,vertical resolution,analog bandwidth,storage depth,effective number of bits and time base gear of this design can meet the design requirements and complete the research objectives.