| Arbitrary waveform generator(AWG)can generate a variety of standard waveforms and user-defined arbitrary waveforms,and its core technologies are direct digital frequency synthesis(DDFS)and direct digital waveform Synthesis(DDWS).In DDWS,the sampling clock frequency often changes in small steps to achieve high frequency resolution requirement,but it also cause the output image frequency position to be unfixed,and it is difficult to filter it out with a low-pass filter with a fixed cutoff frequency.Besides,in DDFS and DDWS,the zero-order hold characteristics of the DAC and the nonlinearity of the analog channel also affect the amplitude flatness of the output signal.Therefore,this thesis takes the 800 MSPS arbitrary waveform generator as research object,studies the DDWS technology based on sampling rate conversion aiming at the problem that the image frequency position is not fixed caused by DDWS,studies the DDFS/DDWS technology based on amplitude-frequency correction aiming at the problem of amplitude unevenness caused by DDFS and DDWS,and completes the design and implementation of the data processing module with 800 MSPS sampling rate.The main works are as follows:1.Design and implementation of data generation module and digital-to-analog conversion interface module.In order to make the standard waveform achieve frequency agility in same shape waveform,this thesis uses the method of DDFS-Based 4-channel parallel memories to generate standard waveform data with 800 MSPS sampling rate.In order to make the arbitrary waveform achieve the deep memory requirement of 256 M points,this thesis uses DDWS to generate arbitrary waveform data through controlling the reading of DDR3 SDRAM by the AXI DMA IP core.After processing by data mapping,the waveform data generated above is sent to the DAC through the JESD204 B IP core for digital-to-analog conversion to obtain the analog waveform.2.Design and implementation of sampling rate conversion module.Aiming at the problem that the image frequency position is not fixed caused by DDWS,this thesis studies the sampling rate conversion technique based on the Farrow structure filter.In order to realize the conversion from 5SPS~800MSPS to 800 MSPS sampling rate,this thesis adopts 4-channel parallel Farrow structure and analyzes its time parameter solution method.Through the analysis of the index and error,this thesis selects the appropriate filter coefficients.Finally,this thesis uses five modules of shift register module,polyphase filtering module,time parameter processing module,filtering result processing module and polynomial calculation module to implement its logical design.3.Design and implementation of amplitude frequency correction module.Aiming at the problem of amplitude unevenness caused by DDFS and DDWS,this thesis studies the amplitude-frequency correction technique based on FIR filter.In order to achieve800 MSPS sampling rate with as little resource consumption as possible,this thesis adopts4-channel parallel FIR structure based on an improved fast FIR algorithm(FFA).Through the analysis of the index and error,this thesis selects the appropriate filter order.Finally,this thesis uses five modules of data scaling module,data preprocessing module,filtering module,data postprocessing module and data restoration module to implement its logical design.The test results show that the AWG designed in this thesis can output standard/arbitrary waveforms with a maximum frequency of 80MHz;it can not only convert the sampling rate from 5SPS~800MSPS to 800 MSPS,but also correct the amplitude-frequency distortion caused by DAC and analog channels.And its spurious free dynamic range is greater than 72 d Bc when the output waveform frequency is less than 1MHz,and its amplitude flatness is less than 0.4d B within DC~80MHz after correction,which is equivalent to the relevant indicators of NI’s PXIe-5433. |