Research On Frequency Locking Technology Based On Digital Linear Phase Comparison

Frequency-locking technology is used to output high-precision and high-stability frequency signals.The realization structure includes Frequency-Locked Loop and Phase-Locked Loop,which is the basic condition of modern scientific development.In recent years,the development of technologies such as satellite navigation,5G network communication,and new energy power supply has put forward higher requirements for the anti-interference ability,response speed,stability and accuracy of frequency-locking technology.In response to the above requirements,this thesis studies the Digital Linear Phase Comparison Method.A PLL system based on the digital linear phase comparison method is designed to explore the frequency locking technology with higher precision and faster response.This thesis introduces the frequency locking technology firstly.The frequency-locking technology can be implemented by a FLL or a PLL.The PLL adjusts the phase information to lock the frequency and has higher control accuracy.Therefore,the PLL is selected as the basis structure.In the study of periodic signals,the group phase theory points out that the phase change of the frequency signal in a least common multiple period is periodic.In the process of quantization of the analog signal,the linear region of the sinusoidal signal has the largest rate of change,and the phase information corresponds to the corresponding.The relationship between the quantized voltages is also the most sensitive.Using the multiple relationship between the clock signal and the measured signal,the phase difference value of the linear region is extracted for phase processing.This theory is the Digital Linear Phase Comparison Method.Because the Digital Linear Phase Comparison Method has been used for frequency comparison and measurement,good results have been obtained,so in this design,the Digital Linear Phase Comparison Method is used to improve the phase detection part,and a PLL based on the Digital Linear Phase Comparison Method is designed.The hardware of the system includes ADC,FPGA,MCU,DAC and VCO.In this thesis,the device selection and peripheral circuit design are explained in detail;the software part includes phase difference acquisition algorithm and dynamic phase processing process.The phase difference acquisition algorithm is completed in FPGA,combined with the characteristics of the sine function to filter the large amount of data sampled by the ADC,and obtain the quantized phase difference information that falls in the linear region,which is transmitted to the singlechip microcomputer through the communication module.The dynamic phase processing process is completed in the MCU,calculates the change of the phase difference in the linear region in the two adjacent least common multiple cycles,and dynamically adjusts the change value in a small range in combination with the control algorithm.Use the change of the phase difference value to control the analog voltage value of the DAC.This voltage value will act on the voltage control terminal of the VCOCXO to adjust the feedback frequency.After the PLL system based on the Digital Linear Phase Comparison Method was built,the system was verified by experiment and error analysis.For this system,an open-loop experiment and a closed-loop experiment are designed.The open-loop experiment is divided into self-calibration experiment and measured source test experiment.The results of the selfcalibration experiment reflect the highest accuracy of the system,and the stability of the system can reach the level of E-13;the test experiment of the source under test reflects that the VCO will have a certain degree drift of existence over time when it is not locked.the frequency stability is in the order of E-11.In the closed-loop experiment,the locked output frequency was measured.After locking,the frequency stability of the VCO entered the E-12 level,which proved that the system has a certain improvement effect on the frequency stability index of the locked source.The PLL system based on the Digital Linear Phase Comparison Method processes the phase information,and completes the locking of the measured frequency through a negative feedback loop.When the clock signal is 100 MHz,it can lock signals from 1MHz to 10 MHz or even lower than 1MHz,which effectively expands the range of the locked frequency.The final test results show that this PLL can improve the performance indicators of the controlled source.This design shows that the Digital Linear Phase Comparison Method can be applied to frequency-locking technology,which is of great significance to the design of higherprecision long-distance time service and frequency corrector.