System Design Of Network Protocol Analyzer Based On FPGA

With the popularity of network communication,the topology of the network becomes more and more complex.For the development and construction of Ethernet equipment,the maintenance and detection of network links,the Ethernet network protocol analyzer is particularly important.However,current network protocol analyzers based on the x86 architecture have limitations.Combined with practical application scenarios and project requirements,this paper designs and implements a kind of FPGA-based Ethernet network protocol analyzers,which completes the functions of performance testing,RFC2544 international standard protocol testing and network topology discovery.The commercially standardized analyzers have been improved to a certain extent in power consumption,system architecture,processing delay and so on.The hardware system of the Ethernet network protocol analyzer uses ZYNQUltrascale Soc and Kintex FPGA as the core processor,builds the memory with 17 highspeed DDR chips,and is equipped with 12 channels of SFP+ 10 Gigabit Ethernet and5 channels of 10/100/1000 M auto adaptive network interface.The whole system is complex,which contains 2657 electronic components,8284 connections and 1765 netlists.The board contains 566 high-speed signals.The single-ended signal rate can reach up to 2666 Mbps,and the differential signal rate can reach up to 10.3125 Gbps.Therfore,signal integrity and electromagnetic interference are unavoidable challenges.The system contains 29 distributed power sources and the maximum current can reach19 A.Therefore,power integrity is also challenge.With the basis of theorety and the simulation verification,the problems above are finally solved in PCB layout to meet the requirements of hardware system function and performance.Based on the hardware platform,the logic design and embedded software development are carried out.In the logic design part,the basic protocol of TCP/IP network communication is implemented in FPGA through Verilog hardware programming language,and the main function modules for performance parameter test,RFC2544 standard protocol test and network topology discovery are designed.The embedded software development part completes the storage and transmission of configuration instructions and test data based on C language,.On the PC,the visual interface design and database management are completed based on Node JS,Java Script and other programming languages.In summary,this paper completes the hardware platform design,FPGA programmable logic design and host computer software design of the Ethernet network protocol analyzer,which provides a solution for ensuring reliable network links and testing the reliability of network equipment,with strong scalability and wide application prospects...