Channel Measurement And Modeling In 3D NAND Flash Memory

With the advantages of high speed,small size and low power consumption,3D NAND flash is gradually replacing the traditional hard disk drive（HDD）in the field of data storage and is becoming the current mainstream storage medium.Due to the very huge capacity enhancement potential of 3D NAND flash memory,its unit storage cost will have better benefits in the future,and has been heavily used in consumer electronics storage,high-performance data centers,cloud computing and other fields in recent years.However,there are problems with the data storage reliability of 3D NAND flash memory with high storage density.The higher the storage density,the shorter the lifetime of the flash memory.And it is also more susceptible to other noise coupling co-interference in the storage process,which affects the data reliability of 3D NAND flash memory in the storage process.In addition,the application of multi-layer stacking technology generates layer variation,which affects the 3D NAND flash memory reliability.Most of the current research work has only simulated and measured the noise channel of some models of 3D NAND flash memory.The noise model established for the flash memory channel to regulate the reference voltage is missing for improving the storage reliability.In order to obtain a more comprehensive 3D NAND flash channel data and channel model,this thesis selects a total of two mainstream 64-layer FG-type and CT-type 3D NAND flash chips for channel measurement and modeling research,and the main research contents are as follows.（1）The basic structure of FG-type and CT-type 3D NAND flash memory and the basic operation logic are introduced.The materials of FG-type and CT-type 3D NAND flash memory are analyzed,where FG is a conductor and CT is an insulator,and this structural difference is the main influencing factor of the difference between the two in the subsequent error measurement.（2）Analysis of the noise types of 3D NAND flash memory and the causes of noise generation,introduction of the coupling phenomenon existing between the noise,where the PEC noise brought about by the number of flash memory erasures will make the degree of influence of other noise change.The experimental design based on the phenomenon of PEC noise coupling.（3）BER test and threshold voltage distribution scan of FG-type and CT-type 3D NAND flash memory after noise addition experiments based on flash memory analysis platform.The measured channel characteristics of flash memory under different combinations of noise coupling were obtained,and the degree of noise coupling influence by BER curve and threshold voltage distribution heat map were shown.（4）Based on the threshold voltage distribution from the test,the optimal reference voltage under different noises is calculated.Also,the corresponding optimal reference voltage model under the influence of multi-dimensional noise coupling is established.And the reliability performance of the model on FG-type and CT-type 3D NAND flash memory is verified by the actual testbed.In this research work,the main work focuses on measuring and modeling the channels of 3D FG NAND flash and 3D CT NAND flash using the same test procedure and modeling method.This work is one of the few works to measure and model the channels of FG-type and CT-type 3D NAND flash with the same standard.After applying the optimal reference voltage model,the BER of FG-type 3D NAND flash memory is reduced by 20.0% on average,and the BER of CT-type 3D NAND flash memory is reduced by 30.0% on average,which is a significant improvement in overall reliability performance.