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Design Of Airborne Graphics Acceleration Processor Based On FPGA

Posted on:2014-07-07Degree:MasterType:Thesis
Country:ChinaCandidate:H Z WeiFull Text:PDF
GTID:2532304886487664Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of avionics,the demand for graphics processing and displaying has become much greater in airborne graphics display system.At present,the genernal embedded CPU has limited efficiency because of complex graphics calculation,and the way of graphics processing and displaying based on conventional PC is too complicated to be stable.Therefore,an airborne graphics acceleration engine based on FPGA is proposed in this paper.In this thesis,the architecture and implemention of the airborne graphics acceleration engine based on FPGA are discussed,and a series of optimazation strategy is proposed.Several kinds of geometric figures,dot-matrix characters,and bitmaps can be effectively generated and displayed by this engine,while several kinds of peripheral interfaces can also be provided.Moreover,the SOPC technique based on FPGA is used for the function verification of the engine.It shows that the airborne graphics acceleration engine designd in this paper can improve the graphic performance and meet both the aircraft display quality and real-time requirments.
Keywords/Search Tags:Graphics Acceleration, Airborne Graphics Display, FPGA, SOPC
PDF Full Text Request
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