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Research On Picosecond-Level Programmable Precision Delay Triggering And Synchronous Acquisition Technology

Posted on:2024-05-12Degree:MasterType:Thesis
Country:ChinaCandidate:T YuFull Text:PDF
GTID:2542307058955689Subject:Electronic Science and Technology
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The sampling oscilloscope is a high-bandwidth optical/electrical communication signal a cquisition and analysis device based on the principle of sequential equivalent time sampling.When testing a signal,a power splitter is used to split the periodic high-frequency signal into t wo paths.One path is used as the synchronous trigger signal to drive the precision delay modu le to generate the sampling pulse,which synchronously samples the other high-frequency sign al at a lower sampling rate using equivalent sampling technology.This technology not only ha s a higher bandwidth but also overcomes the constraint of the AD converter’s sampling rate.B ased on the high-speed optoelectronic xxx analyzer project,this paper designs a precision dela y trigger circuit with a resolution of 1ps and a dynamic range of 10 ns,as well as a dual-channe l high-precision synchronous acquisition circuit with an intermediate frequency input range of±10V.The main aspects include:Firstly,The principle and implementation methods of random equivalent sampling and se quential equivalent sampling are studied in this paragraph.Various delay methods are analyze d for the synchronous delay function used to drive high-bandwidth samplers.Based on the ind ex requirements of high resolution and wide dynamic range delay sampling pulses in the proje ct,a programmable delay line method based on a "coarse + fine" two-stage delay framework i s proposed,and theoretical analysis is conducted.Secondly,The programmable precision delay trigger circuit based on a "coarse + fine" tw o-stage delay framework is designed in this paragraph.The externally input 0.1-12 GHz trigger clock signal is divided by a programmable frequency divider chip to generate a synchronous c lock signal of 100MHz-250 MHz,which drives a high-speed counter chip to count.When the c ounter reaches the preset value,a synchronous carry pulse signal with a frequency of 50 KHz i s generated.At the same time,the coarse delay chip and the fine delay chip start working and output sampling pulses with a certain delay under the driving of the synchronous carry pulse s ignal.These sampling pulses drive the sampler to perform precise sampling of the synchronou s high-frequency signal.Thirdly,Based on the principle of sequential equivalent sampling,a dual-channel high-pr ecision synchronous acquisition circuit is designed in this paragraph.The precision delay trigg er system generates sampling pulses to drive the sampler to perform synchronous sampling of a 20 GHz high-frequency signal.After sampling,the intermediate frequency signal processing system outputs a 50 k Hz intermediate frequency signal,which enters a vertical gain control cir cuit for programmable amplification.The high-precision data acquisition circuit synchronousl y acquires the amplified intermediate frequency signal under the driving of the synchronous sa mpling pulse generated by the precision delay trigger circuit.The acquired digital signal is tra nsmitted to a PC for waveform reconstruction through a USB2.0 data transmission circuit.Through the above design and debugging work,a high-precision delay trigger circuit wit h a resolution of 1ps and a dynamic range of 10 ns,as well as a dual-channel high-precision sy nchronous acquisition circuit with a ±10V intermediate frequency input range,have been succ essfully implemented,meeting the requirements of the project indicators.
Keywords/Search Tags:Sampling oscilloscope, equivalent sampling, delay generator, multistage delay, vertical voltage gain
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