Test Parameters Optimization Method For Analog IC By XGBoost

As the scale of integrated circuits continues to increase and their test cost increases with test time,how to optimize the test parameters is an important topic.In analog integrated circuits,The existence of nonlinear implicit dependencies among test parameters makes it very difficult to directly reveal their interrelationships and perform test method optimization.Therefore,this thesis investigates the optimization of IC test parameters based on XGBoost algorithm.The main research work of this thesis can be summarized as follows:1.Proposing an optimization method of test parameters based on the ranking of characterization ability,this method explores the mutual characterization ability of different test parameters in the test data set,and obtains the list of test parameters to be optimized according to the ascending order of the characterization ability of the test parameters.According to this list,the test parameters to be deleted are selected in turn,the prediction results of the remaining test parameters on those test parameters are obtained.The thesis discusses four metrics to evaluate the inter-representation capability of test parameters,such as the value of loss function,number of faults,feature importance and shapley value.The results of two types of analog IC test datasets show that the value of loss function and the number of faults can be used as a basis for assessing the ability to characterise the test parameters and can reduce up to 7 test parameters,accounting for 24.13% of the total test parameters under the condition that the test escape rate does not exceed 20 PPM.2.Proposing an optimization method of test parameters based on characterization graph analysis,this method establish a representation graph between the test parameters by introducing feature importance,and obtains the list of test parameters to be optimized after the analysis of representation graph.All test parameters in this list can be deleted.The feasibility of the method has been experimentally demonstrated,and can reduce up to 10 test parameters,accounting for 25% of the total test parameters under the condition that the test escape rate does not exceed 20 PPM.In addition,compared with the other two representative static optimized test parameter schemes,the proposed method can delete more test parameters while ensuring the same test quality.3.The impact of data size on the optimization of test parameters is discussed,the optimization methods proposed in this thesis are able to obtain good optimization results when reducing the sample of the training set.The optimization method based on characterization ability ranking can reduce the test parameters by up to 24.13% with only 70%of the original training set.The test parameter optimization method based on representation graph analysis can reduce the test parameters by up to 25% with 80% of the original training set.For the data imbalance problem existing in the analog IC test parameters data set,by comparing the optimization effects of the two methods of oversampling and undersampling and tuning the ratio of positive and negative samples of the data set,this thesis find that oversampling the training set can effectively improve the optimization performance of the test parameters,and the best optimization effect is obtained when the ratio of positive and negative samples of the training set of the two types of data sets reaches 1:2 and 1:3 respectively.The two methods proposed in this thesis can provide the basis for reducing the test parameters of analog integrated circuits,which can effectively reduce the time and cost of analog integrated circuit testing.The two methods can statically optimize the test parameters of analog integrated circuits and have a better scope of application than adaptive testing.