Investigation Into Information Processing And Data Compression Technology Of Advanced Power System Recorder

Analyzing the system operation under normal and fault states according to the data provided by power system recorders is the key point for prevention and treatment of failure in power system. This paper investigates into the key technologies of power system recorders to develop new generation of power system recorders.The dynamic data acquisition and processing unit of power system recorders is discussed and a three-level information processing model for power system recorder is proposed. Based on this model, the synchronous data acquisition based on high-precision GPS timing, DMA transfer control mechanism based on two-stage ring-type data structure and high-efficient data storage and transfer based on large ratio data compression technology are realized. The DMA transfer and an inter-bus FIFO mechanism are developed to improve the system efficiency and increase MTBF (mean time between failures). Sample and hold and multiplexing circuit are designed to realize multi-channel synchronized data acquisition. Eventually a high-efficiency data acquisition system combined with high-speed buffer, DMA and high-speed bus are realized.Digital power management system is developed for power system recorders. A multi-output digital DC-DC converter is designed. DPWM based on second-order sigma-delta modulator is designed to avoid limit cycle. The controller uses floating-point multiply-accumulator as its operation unit. We developed fast integer-float and float-integer conversion mechanism based on look-up tables and a control law computing optimization mechanism to enhance floating-point operation speed, and further propose a controller timing and state machine optimization mechanism to avoid the delay generated by control law calculations, analog-digital conversion, etc.. Dual-mode compensator is implemented to resolve the contradiction between DPWM resolution and the duty cycle adjust frequency to achieve a high dynamic response, no limit cycle stable output. For the switching power supply interference on analog-digital conversion, a noise suppression method is proposed by sampling time synchronized with PWM period based on digital DC-DC converters.Based on GPS clock and crystal oscillator clock accuracy complementary model, precise timing is achieved by time series analysis method. The original time series is generated by IRIG-B synchronized decoding. The time scale for time series analysis is determined according to period stability of the model. For the unreliability characteristic of GPS PPS, a real-time missing values and outliers judging method is proposed to make time-series analysis pre-processing. Precise timing is achieved in two methods. The first one is based on Cramer decomposition theorem certainty analysis methods. The second is to use stochastic analysis, using stochastic analysis to establish time series ARI model, then the model is applied to adaptive kalman filtering to achieve precise timing. The second method can get higher precision than the first one.A power system long sampling series two-dimensional data compression algorithm algorithm based on information reordering is proposed. In order to eliminate coupling of information-within-cycles and information-between-cycles of the asynchronous sampling data, spline interpolation methods is used to convert asynchronous sampling data into synchronous sampling data before data compression. The improved algorithm achieves large ratio data compression. An alternative synchronous sampling method is further proposed. Using synchronous sampling method to generate synchronous sampling data, then the sampling data is reordered and compressed. This method can also achieve large compression ratios, and the calculation speed is higher then the first one.The research in this work enhanced the power system recorder data throughput and processing capacity and met the power system development needs.