Research On Anti-radiation Technology In Combinational Circuit Using Placement Method

With the rapid development of the aerospace industry,the analysis and hardening technic of the radiation effects on integrated circuits in the space environment have increasingly become the focus of academic and industrial fields.In the past few decades,the mechanism of single event effects has been thoroughly studied,and many reliable and effective methods for single event upset have been proposed.However,as integrated circuit manufacturing processes advance and clock frequencies increase,soft errors in combinational circuits are becoming a major source of total soft errors.Charge sharing effects,circuit reconvergence phenomena,and multiple transient phenomena pose new challenges to the analysis and hardening of soft errors.The method of soft error analysis and hardening has also expanded from the device level to the circuit level and system level.In this paper,we use placement method and model checking techniques to analyze and harden the combinational circuit under the nanotechnology.The main achievements are as follows.In this paper,we use placement method and model checking techniques to study the sensitivity analysis,evaluation methods and hardening methods of combinational circuits under nanotechnology.The main contributions are as follows.(1)We propose detailed placement for pulse quenching enhancement in antiradiation combinational circuit design.After analyzing the relationship between circuit layout and pulse quenching effect,we propose a method to increase the number of quenching unit pairs and enhance the pulse quenching effect between the QUs by using the placement method,including enhancing move,inserting move and swapping move.The inserting and swapping move can increase the number of QUs in the circuit,and the enhancing move can enhance the pulse quenching effect.The proposed method can be used independently,or be used with commercial EDA tools.The platform is extensible and can be applied to practical engineering.The method consider the tradition optimization target to achieve the balance of wire length,density and anti-radiation performance Simulation results show that our proposed method can reduce the soft error vulnerabilities by 14%-26%.(2)We propose a SAT-based method to analyze the SET reconvergence and hardening technology in the combinational circuit.The reconvergence-phenomenon is common in modern circuit design.It occurs when the signal reconvenes at a certain point through multiple sensitized paths.The reconvergence phenomenon may affect the SER analysis hardening.However,not all reconvergence paths are sensitized due to logical masking.It’s closely dependent on the input vector.we propose a method to analyze the reconvergence-phenomenon in combinational circuits using a SAT solver.For a given node,our algorithm can determine whether there are sensitized reconvergence paths between the node and its reachable outputs.If possible,the corresponding input vectors are given at the same time.According to the results of the solutions,the sensitive nodes in the circuit can be de ? ned.The results show that compared with random hardening,the average soft error rate is reduced 20%by hardening the node selected by our method.(3)We propose a method to analyze MSET in combinational circuits,and a hardening strategy using placement.Under advanced technology,single particle striking may affect more cells,and MSET has become the main source of soft errors.The difficulty of multi-transient analysis is that it is closely related to the circuit layout.In order to solve this problem,we use the model checking technique to implement a multi-transient analysis method for combinational circuits.The proposed method combines the layout information to establish a sensitized model for the cells.Then we use the SAT solver to calculate the cell sensitivity,the regional sensitivity and the circuit sensitivity.Experiment shows that the layout has a great impact on circuit sensitivity.We propose two detailed placement algorithms to optimize the the circuit sensitivity.Simulation results show that our proposed method can reduce the MSET sensitivity factor by 10%-21%,and the soft error vulnerabilities by7%-21%.