The Research Of Distributed Digital Fault Recorder

With the 1000kV UHV power grid construction in the "Eleventh Five-Year" period, and the proposal of "smart grid" project, the scale of grid reached is expanding, processing and transmission of power failure information will show a "massive" state. The networking equipments including fault recorder can't realize information exchange and resource sharing, which causes a "bottleneck" in the effective use of information. The digital realization and support of fault recorder tostandard's IEC 61850 are becoming an unavoidable issue.The research of distributed and digital fault recorder is based on development of the non conventional instrument transformers, IEC 61850 standards, network communication technology, FPGA and other major supporting technology. In the hardware scheme, Use the FPGA chip-based system instead of the mainstream FPGA+DSP+32 bitCPU chip.IEC 61850 was choosed as standards between the communication of fault recorder and other networking equipments.And IEC 61850-9-1 and GOOSE packets were analyzed in detail. For these two different sources of information, this paper choosed PPS and software synchronous clock for the GPS redundant design. In digital signal processing, CORDIC algorithm was applied, after simple addition and subtraction and shift operations, starting criterions were integrated into the single FPGA. In the data storage module, this paper used Nios II processor+Linux operating system to generate consistent COMTRADE format files and record in the SD card.The distributed and digital fault recorder support for IEC 61850 comprehensively, and meanwhile "Plug and Play" in the digital substation was realized, fault wave files consisted with the COMTRADE format,information exchange and resource sharing in different networked devices were also realized.In the design of hardware, full use of FPGA's parallel data processing capabilities was used. Each functional module was connected in the FPGA chip, with no external wiring, which could avoid the electromagnetic interference caused by the usage of the different chips.And each module was independent and worked parallelly in the FPGA chip,which improved the capabilities of data processing. And fault information was delivered timely, rapidly and accurately. Ensure the safe operation of grid.