Design Of APFC Controller XD5265 With THD Optimizer Circuit Based On CRM

In the Field of switching power supply system, any circuits that make the input current nonsinusoidal, or even a sine wave but different phase with the input sinusoidal voltage, will reduce the power factor, produce the loss of power and lead to a decrease in the power efficiency and a harmonic pollution to the electricity network. Therefore, it has become one of the focuses in the study of improving the PF of Switching Power Supply. APFC technology is widely used for its wide input range, small size, little weight and high power factor.Based on the project of Xidian University"Theoretical research and design of the key technique for deep-submicron mixed signal ASIC", an Active Power Factor Correction Controller XD5265 is proposed in this paper. The controller requires compliance with IEC 1000-3-2 harmonic reduction standard for low-to-medium power applications. It is designed for a Boost regulator and peak current mode control, operating in critical conduction mode. In the view of the shortcoming of the traditional PFC chip in slow transient response, the OTA is developed with low band width filter function and innovative slew rate enhancement circuits. Furthermore, to improve the input current zero-crossing distortion and the THD performance of the circuit in the application, an analog multiplier with THD optimization circuit is proposed in this paper.On the basis of completing the PFC operational principle and designing of the circuits, the whole circuit is designed based on the 40V 0.40μm BCD process. The simulation and verification is completed by the EDA tools such as Cadence, HSPICE etc. According to the simulation results, XD5265 realizes the function of PFC perfectly, and all the simulation datas meet with the design specifications well.