The Precisionnumeral Frequency Meter Design Based On Single Chip Machine And CPLD

In the field of electronic measurement, the frequency checking is one of most fundamental and critically important measuring methods. Because frequency signal, which is easily transported, has strong resistance to the disturbance and can be measured with high precision, research on the method by measuring frequency have more and more significance in the real application.With the help of CPLD and cooperating with the single chip computer AT89C51, the digital frequency design in our program have realized the precision measurement of 0. lHz-50MHz signal frequency by adopting the current EDA technique prevailing in the electronic designs and using the principle of multi-period synchrony frequency measurement. Besides, Via selecting 8 buttons, the system can measure the width of square wave signals and room-occupying ratio of high level to low level.During the design, a chip EPM7128SLC84₁5 in CPLD fulfills timing logic control and count function. Under the flat of Quartus II, through VHDL language CPLD software design, compilation, debug, simulation and download can be carried out. By use of the AT89C51 single chip computer as the main controlling parts, the AT89C51 realizes test signal control, keyboard scan and output display of LED. The system combines the control flexibility of AT89C51 with programmable performance of CPLD, so not only can it shorten the period of the development and research, but also has the advantages of compact structure, little volume, high reliability, wide scope and high precision.This paper has particularly described the top-to-bottom design method of the system, the circuit composite of the hardware and the software program device of CPLD and single chip computer. Under the test environment of the system developed by GW48-CK EDA experiment, the precision and velocity of the measurement have been obtained after the simulation and the test of the hardware.