Design Of Harmonic Detecting Equipment Based On FPGA In Power System

With the development of society, people's demand for electricity, especially high quality electricity has been increasing. However due to extensive use of non-linear load, it has brought serious power harmonic pollution which has a serious impact on safety, stability and efficient operation of electric system, and it is harmful to electric equipment. How to reduce the harm from power harmonic is the most concerned problem in current electric system. The harmonic detection is an important branch of harmonic research, and it is the basis to solve other harmonic problems. Therefore the harmonic detection and research have important theoretical and practical value.At present power system harmonics detection devices in use are mostly based on microprocessor design. Microprocessor is the core of the whole system and it decides the performance of the products directly. The system based on microprocessor has the shortcomings of low efficiency, low resources utilization ratio and being disturbed easily. Due to the development of microelectronics technology, especially the development of ASIC (Application Specific Integrated Circuit) design technology, it becomes impossible to design ASIC for harmonic detection in power system and provides a new approach for the hardware design of the harmonic detecting equipment. The goal of the article is to design ASIC which can realize high-precision harmonics detection of power system. The hardware design for harmonics detection based on ASIC has merits of small volume, fast processing speed and high reliability. Due to its wide application range and vast scale demand, the ASIC for power system harmonics detection has great application foreground.The current harmonic detection standards are introduced and the trend of harmonic detection is analyzed in the paper. According to function demand of the equipment, especially the measurement algorithm of standard parameters of harmonic detection, the SOPC scheme based on FPGA is proposed for the system. Through the analysis of functional model for ASIC of power system harmonics detection, the module division of the ASIC is conducted. The function of each module and theirs connection ways are analyzed, and the parallel structure of the ASIC for harmonic detection is put forward. The hardware platform for implementation and verification of ASIC based on FPGA is designed Combined with EDA (Electronic Design Automation) tools for ASIC, developing environment for ASIC of intelligent monitoring unit is constructedAccording to different function properties in FPGA designing, the system can be divided into two modules: user logic module and Nios processor module. The function of user logic is analogy data acquiring by controlling A/D converter and data processing. The results are sent to RAM in the chip, waiting for Nios processor access. The Nios processor receives and processed the data from user logic module, and the ultimate results are sent to upper computer through serial interface.At last, the whole project is compiled, synthesized and optimized, and the correctness of the design is validated by the logic analyzer. Under the condition of laboratory, corresponding experiments have been done to prove the effectiveness of the design. The results indicate that the monitoring equipment can meet the need of power system harmonics detection.