Power System Protection The Base 4fft Module Design And Implementation, In The Sopc

With the rapid development of the national economy and people'sliving standard continued to improve, increasing demands are berequested of a secure and steady power network. Safe and reliableoperation of the power system becomes the basis to maintain socialstability development. As electronic technology, computer technologyand communication technology growing, the new development providedthe powerful technological support to digital power protection. This paperanalyzes the theoretical development in recent years and last progress: theprotective theory becomes simple logic judgment to classical FFTarithmetic; and equipments are also from transistor-base tomicrocomputer-base protection. Because of microcomputer's advantagesin structure, many advanced electrical protection algorithms can beprocessed on microcomputer-based equipments, this also promote thedigital protection rapidly. However, because of the weakness of processor,the system complexity limited and other problems, make existingprotector has some limitations. This paper analyzes and discuses the kindand probability of exceptions, consider that digital protection is to extractuseful signals from chaotic signals effectively; and the advantages ofFourier transform in frequency domain analysis set it to be the classicaltheory in digital protection. This paper presents a new framework forprotection, using the new SOPC technology of Altera Co, design auniversal platform for power digital protection base on Niosâ…¡soft-coremicroprocessor.Niosâ…¡soft-core microprocessor is Altera's SOPC solution, it is besupplied to designers in IP core; users rely on Altera's SOPC Builder andother development tools, according their own needs choice an appropriateCPU and peripherals to customized a on-chip programmable system quickly. Depending on the demand of the basic model of power systemdigital protection, comprehending the future development, this designproposes the base structure for universal platform of digital protection;combining SOPC technology, according to the needs, this paper design afast Fourier transform in FPGA, and do functionality and timing analysis,simulation for its cells. By mean of hardware Fourier algorithm as acoprocessor, this paper customizes the SOPC common platform fordigital protection, let 64-point, 12-bit integer radix-4 FFT model as thecore operational component be embedded into the Niosâ…¡SOPC system,and write some code to test the Niosâ…¡hardware and radix-4 FFTprocessing component, also proves that user-defined FFT componentworks well in Niosâ…¡system, and meets the design objectives.