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The Study And Design Of An Ultra Low Dropout Linear Regulator

Posted on:2010-08-31Degree:MasterType:Thesis
Country:ChinaCandidate:C LiFull Text:PDF
GTID:2132360275958293Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Low dropout(LDO) linear regulator is a DC linear regulator whose input voltage is a little larger than output voltage.As an important member of power management,it has a higner converting efficiency than conventional linear regulator while has more simple structure,lower cost and noise than switched-mode regulator.LDO linear regulator has many advantages such as fast input and output response,fewer external electronic equipments, convenient usage,and so on.Therefore it is applied broadly in Mobile phones,PDA,portable AV equipment,notebook computers,MP3/4 and other portable equipments,and has the vast market foreground.Based on csmc 0.5μm CMOS technology,a 3A ultra low dropout linear regulator is designed in this paper using Cadence EDA circuit design software and Hspice simulation tool. It is specifically designed to provide well supply voltage for front-side-bus termination on motherboards and NB applications.For reducing power dissipation and providing ultra low dropout,there are two supply voltages,a control voltage for the circuitry and a main supply voltage for power conversion.The input voltage range is 1.28V-3.3V,and the output voltage is 1.2V.This chip has an ultra low dropout voltage 85mV under the typical load current condition of 3A output current.The line regulation,load regulation and power supply rejection ratio(PSRR) are good enough for application.A under voltage lockout(UVLO) circuit monitors the main supply voltage to prevent wrong operations.A over temperature protection(OTP) and over current protection(OCP) functions protect the IC against thermal and current over-loads.A power-OK(POK) indicates the output status with time delay which is set internally.In this paper,the marketing situation,development trend and sort of power management is analyzed first.Then the basic theory,overall structure and system design of LDO linear regulator is given.And then the sub-block circuits are designed in details with Cadence and simulated with Hspice,and the reasonable electric circuit data is given.The results indicate that all sub-circuits are designed right and reasonable.After that,the whole LDO linear regulator is simulated;the function and performance are both satisfied with the demand. Finally,according the design rules,the layout is designed,and the whole layout is checked for DRC and LVS using Dracula layout verification tools.
Keywords/Search Tags:Power Management, LDO linear regulator, Error Amplifier, Stability
PDF Full Text Request
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