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ASIC Design Of Micropower Low Noise LDO Regulator

Posted on:2007-09-22Degree:MasterType:Thesis
Country:ChinaCandidate:H Y LiuFull Text:PDF
GTID:2132360302969248Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the fast growing development of low-power consumption and high-efficiency portable electronic products, the performances of power management ICs are improved higher and higher. As a kind of the power management ICs,LDO (low dropout) linear voltage regulator has become more and more important and popular nowadays.Because of the advantages of high performance-price ratio, small size, simple periphery circuit, and micropower consumption, LDO linear regulator has been widely used.Based on the project "Theoretical research and design of key techniques for CMOS LDO", a micropower low noise and ultra LDO XD1095 is designed in this paper.On the basis of analyzing systematically the general structure,operation principle and key techniques of LDO linear regulator, the fundamental structure and the sub-block circuits are designed in detail.The PMOS transistor is adopted as the pass element to make the typical dropout voltage only 60mV, the design of ultra low dropout voltage. fast turn-on and turn-off, and low quiescent current as well as others reduces the power consumption mostly; The characteristics of LDO, including the noise and PSRR(power supply rejection ratio)are analyzed, and a low-pass filter is introduced specially for the bandgap which is the primary noise contribution so the noise of bandgap and the system is reduced remarkably; The frequency and phase characteristics as well as the theory of compensation are analyzed and considered in detail.Because of the demand of LDO's stability, dynamic frequency compensation circuit is designed instead of the output capacitor's ESR(equivalent series resistance), so the system's stability in the whole range of load is improved and cost is reduced evidently;The over-temperature and over-load protection circuits are introduced to shut down the chip whenever the operation temperature is too high or the load is too large to protect the chip to be damaged.When all of the operation conditions is recovered, the chip starts up automatically;ViewDraw, Hspice and other EDA software are used in circuits design and run simulation in many compounding conditions of model,temperature and power supply voltage, etc..The results of simulation meet the function and specification: Finally, some key techniques of analog layout are raised from the point of view of project, which provide references for layout design of the chip.
Keywords/Search Tags:power management, LDO, power consumption, noise, dynamic frequency compensation
PDF Full Text Request
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