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The Design Of Enhanced 8-bit MCU IP Core

Posted on:2008-05-30Degree:MasterType:Thesis
Country:ChinaCandidate:B YuFull Text:PDF
GTID:2178360215951068Subject:Microelectronics and Solid State Electronics
Abstract/Summary:
Development and use of IP cores has been the main design method for SoC (System on a Chip) design since the IC design enters into SoC design era. However, IC design in China develops latter than some other countries, it is significant for us to design the IP cores which belong to us.MCU (Micro Controller Unit) IP core as an embedded micro controller unit, has widely been used in the fields of communication, electronic products for daily life,computer, medicine, instruments, and so on. In these application-embedded systems, MCU based on 51 instruction system holds on the important place, because of its low price and high performance. Today it need to have higher performance to adapt the expanding of the application domain. Base on this point,this thesis researchs and designs a 8-bit CISC MCU IP core,which is compatible with standard 8051.In system architecture, analyzes the bottle-neck why standard 8051's performance can't enhance, and improves these in the design of the new MCU IP: adjust the machine cycle from 12 to 4; use independent bus to access different function model; use pre-fetching instruction method.In arithmetic, optimize the design of the key model in MCU IP core. In ALU design, use leading-carry extendable algorithms to improve performance of adder circuits, use optimized shift-add algorithms to improve performance of division circuits. In controller design, analyze the two traditional methods: hard route and micro-program, combine them to creat a new method to improve the controller's performance.The MCU IP core designed in this thesis pass the full functional verification and FPGA hardware verification.
Keywords/Search Tags:SoC, IP, CISC MCU, System architecture, instruction set, FPGA verification
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