Complex Instruction Set Fast Decoding Design

CISC instruction is complex in function and variable in length. So research on how to design a suitable decoder can speedup the instruction decoding, enhance the efficiency of the instruction pipeline, and consequently improve the performance of microprocessor effectively.I was working on the "National Advanced Research Project", during which I finished the design and verification of the instruction decoder in "Longtium C1"— a 32bit CISC microprocessor. "Longtium C1" is compatible with Intel486DX2 in instruction set and also has been used in "Longtium S1" industrial control system as the microprocessor IP core.The research work of this paper mainly includes:1. Studied the architecture of Intel486DX2, took part in and finished the design of the architecture of "Longtium Cl".2. Deeply studied the principle of the "Longtium Cl" instruction system and designed a basic decoder.3. Deeply studied the length of the 486 instructions, frequency in using of the instructions, the character of the instruction encoder. Brought out the design idea to speedup decoding.4. Designed and implemented express decoder. Completed the verification of express decoder in module level and chip level.5. Studied the decoder in Pentium microprocessor and analyzed the difficulty of the design, presented some ideas for designing the decoder of the microprocessor compatible with Pentium processor.The "Longtium S1" with "Longtium C1" core had been verified in FPGA verification platform on which DOS and some application programes can run. All the work presented in this paper established a foundation for the accomplishment of the pre-research project, and assured the tape-out of "Longtium S1".