USB2.0-based Data Acquisition And Control System Designed For Patch-Clamp

As an important part of the patch-clamp system, data acquisition and control system links personal computer with Patch-Clamp and the other peripheral equipments, realizes the communication of the data and the control commands.A data acquisition and control system based on the USB2.0 (Universal Serial Bus 2.0) and FPGA technology is discussed in this thesis. Under the control of FPGA, The system realized the control of Slave FIFO interface of CY7C68013, accomplished synchronization between data acquisition and signal output; generated the control signal for accessorial devices. Furthermore, with two FIFO memories been integrated into the FPGA, which have asynchronous clock domains, the circuits were simplified and the system stability was improved. It is quite a reasonable design for data acquisition system at present.The system architechure, the interface circuit, the firmware of CY7C68013 and the control logic of FPGA were discussed in detail. After that, timing diagram of the key nodes of control logic which was captured by the software of SignalTap II was described. During the description of the control logic, more attention focused on the design methods. Self-contained operation classes provided the interface to control the data acquisition and control system were mentioned in the end.Test results proved that this system could meet the requirement of high-speed data transmission in patch-clamp system with a total data transmission speed of 800 kB/s and noise level ranging±5 mV.